EBD51RC4AAFA datasheet(14/17 Pages) ELPIDA

Part #	EBD51RC4AAFA

Description	512MB Registered DDR SDRAM DIMM

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Manufacturer	ELPIDA [Elpida Memory]

Direct Link	http://www.elpida.com/en

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EBD10RD4ABFA

Preliminary Data Sheet E0274E40 (Ver. 4.0)

14

Timing Parameter Measured in Clock Cycle for Registered DIMM

Number of clock cycle

tCK

6ns

7.5ns

Parameter

Symbol

min.

max.

min.

max.

Unit

Write to pre-charge command delay

(same bank)

tWPD

4 + BL/2

3 + BL/2

tCK

Read to pre-charge command delay

(same bank)

tRPD

BL/2

tCK

Write to read command delay

(to input all data)

tWRD

2 + BL/2

tCK

Burst stop command to write command delay

(CL = 3)

tBSTW

—

2

tCK

(CL = 3.5)

tBSTW

3

tCK

Burst stop command to DQ High-Z

(CL = 3)

tBSTZ

—

3

tCK

(CL = 3.5)

tBSTZ

3.5

tCK

Read command to write command delay

(to output all data)

(CL = 3)

tRWD

—

2 + BL/2

tCK

(CL = 3.5)

tRWD

3 + BL/2

tCK

Pre-charge command to High-Z

(CL = 3)

tHZP

—

3

tCK

(CL = 3.5)

tHZP

3.5

tCK

Write command to data in latency

tWCD

2

tCK

Write recovery

tWR

2

1

tCK

Register set command to active or register

set command

tMRD

2

tCK

Self refresh exit to non-read command

tSNR

12

10

tCK

Self refresh exit to read command

tSRD

200

tCK

Power down entry

tPDEN

1

tCK

Power down exit to command input

tPDEX

1

tCK

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