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EDS1232ECBH-9ATT Datasheet(PDF) 29 Page - Elpida Memory |
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EDS1232ECBH-9ATT Datasheet(HTML) 29 Page - Elpida Memory |
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29 / 50 page  EDS1232ECBH-9ATT Preliminary Data Sheet E0878E10 (Ver. 1.0) 29 Burst Stop Command During a read cycle, when the burst stop command is issued, the burst read data are terminated and the data bus goes to High-Z after the /CAS latency from the burst stop command. CLK Command DQ (CL = 2) DQ (CL = 3) READ BST out out out out out out High-Z High-Z Burst Stop at Read During a write cycle, when the burst stop command is issued, the burst write data are terminated and data bus goes to High-Z at the same clock with the burst stop command. CLK Command DQ in in in BST WRITE in High-Z Burst Stop at Write |
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