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EDS1232ECBH-9ATT Datasheet(PDF) 20 Page - Elpida Memory

Part # EDS1232ECBH-9ATT
Description  128M bits SDRAM 128M bits SDRAM
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Manufacturer  ELPIDA [Elpida Memory]
Direct Link  http://www.elpida.com/en
Logo ELPIDA - Elpida Memory

EDS1232ECBH-9ATT Datasheet(HTML) 20 Page - Elpida Memory

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EDS1232ECBH-9ATT
Preliminary Data Sheet E0878E10 (Ver. 1.0)
20
Clock suspend mode entry
The SDRAM enters clock suspend mode from active mode by setting CKE to Low. If command is input in the clock
suspend mode entry cycle, the command is valid. The clock suspend mode changes depending on the current
status (1 clock before) as shown below.
ACTIVE clock suspend
This suspend mode ignores inputs after the next clock by internally maintaining the bank active status.
READ suspend and READ with Auto-precharge suspend
The data being output is held (and continues to be output).
WRITE suspend and WRIT with Auto-precharge suspend
In this mode, external signals are not accepted. However, the internal state is held.
Clock suspend
During clock suspend mode, keep the CKE to Low.
Clock suspend mode exit
The SDRAM exits from clock suspend mode by setting CKE to High during the clock suspend state.
IDLE
In this state, all banks are not selected, and completed precharge operation.
Auto-refresh command [REF]
When this command is input from the IDLE state, the SDRAM starts auto-refresh operation. (The auto-refresh is the
same as the CBR refresh of conventional DRAMs.) During the auto-refresh operation, refresh address and bank
select address are generated inside the SDRAM. For every auto-refresh cycle, the internal address counter is
updated. Accordingly, 4096 times are required to refresh the entire memory. Before executing the auto-refresh
command, all the banks must be in the IDLE state. In addition, since the precharge for all banks is automatically
performed after auto-refresh, no precharge command is required after auto-refresh.
Self-refresh entry [SELF]
When this command is input during the IDLE state, the SDRAM starts self-refresh operation. After the execution of
this command, self-refresh continues while CKE is Low. Since self-refresh is performed internally and automatically,
external refresh operations are unnecessary.
Power down mode entry
When this command is executed during the IDLE state, the SDRAM enters power down mode. In power down
mode, power consumption is suppressed by cutting off the initial input circuit.
Self-refresh exit
When this command is executed during self-refresh mode, the SDRAM can exit from self-refresh mode. After exiting
from self-refresh mode, the SDRAM enters the IDLE state.
Power down exit
When this command is executed at the power down mode, the SDRAM can exit from power down mode. After
exiting from power down mode, the SDRAM enters the IDLE state.


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