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EDS1232ECBH-9ATT Datasheet(PDF) 1 Page - Elpida Memory

Part # EDS1232ECBH-9ATT
Description  128M bits SDRAM 128M bits SDRAM
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Manufacturer  ELPIDA [Elpida Memory]
Direct Link  http://www.elpida.com/en
Logo ELPIDA - Elpida Memory

EDS1232ECBH-9ATT Datasheet(HTML) 1 Page - Elpida Memory

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Document No. E0878E10 (Ver. 1.0)
Date Published February 2006 (K) Japan
Printed in Japan
URL: http://www.elpida.com
Elpida Memory, Inc. 2006
PRELIMINARY DATA SHEET
128M bits SDRAM
WTR (Wide Temperature Range)
EDS1232ECBH-9ATT (4M words
× 32 bits)
Specifications
• Density: 128M bits
• Organization
 1M words × 32 bits × 4 banks
• Package: 90-ball FBGA
 Lead-free (RoHS compliant)
• Power supply: VDD, VDDQ = 1.8V ± 0.1V
• Clock frequency: 111MHz (max.)
• Four internal banks for concurrent operation
• Interface: LVCMOS
• Burst lengths (BL): 1, 2, 4, 8, full page
• Burst type (BT):
 Sequential (1, 2, 4, 8, full page)
 Interleave (1, 2, 4, 8)
• /CAS Latency (CL): 2, 3
• Precharge: auto precharge option for each burst
access
• Driver strength: half/quarter
• Refresh: auto-refresh, self-refresh
• Refresh cycles: 4096 cycles/64ms
 Average refresh period: 15.6µs
• Operating ambient temperature range
 TA = –20°C to +85°C
Features
• ×32 organization
• Single pulsed /RAS
• Burst read/write operation and burst read/single write
operation capability
• Byte control by DQM
• Wide temperature range
 TA = –20°C to +85°C
Pin Configurations
/xxx indicate active low signal.
DQ26
1
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
23456789
DQ28
VSSQ
VSSQ
VDDQ
VSS
A4
A7
CLK
DQ24
VDDQ
DQ27
DQ29
DQ31
DQM3
A5
A8
CKE
VSS
VSSQ
DQ25
DQ30
NC
A3
A6
NC
A9
VDD
VDDQ
DQ22
DQ17
NC
A2
A10
NC
BA0
DQ23
VSSQ
DQ20
DQ18
DQ16
DQM2
A0
BA1
/CS
DQ21
DQ19
VDDQ
VDDQ
VSSQ
VDD
A1
A11
/RAS
(Top view)
DQM1
NC
NC
/CAS
/WE DQM0
VDDQ DQ8
VSS
VDD
DQ7 VSSQ
VSSQ DQ10 DQ9
DQ6
DQ5 VDDQ
VSSQ DQ12 DQ14
DQ1
DQ3 VDDQ
DQ11 VDDQ VSSQ
VDDQ VSSQ DQ4
DQ13 DQ15 VSS
VDD
DQ0
DQ2
90-ball FBGA
Address inputs
Bank select address
Data-input/output
Chip select
Row address strobe
Column address strobe
Write enable
DQ mask enable
Clock enable
Clock input
Power for internal circuit
Ground for internal circuit
Power for DQ circuit
Ground for DQ circuit
No connection
A0 to A11
BA0, BA1
DQ0 to DQ31
/CS
/RAS
/CAS
/WE
DQM0 to DQM3
CKE
CLK
VDD
VSS
VDDQ
VSSQ
NC
This product became EOL in September, 2007.


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