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MRF24J40 Datasheet(PDF) 5 Page - Microchip Technology |
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MRF24J40 Datasheet(HTML) 5 Page - Microchip Technology |
5 / 152 page © 2008 Microchip Technology Inc. Preliminary DS39776B-page 3 MRF24J40 1.0 OVERVIEW The MRF24J40 is an IEEE 802.15.4™ Standard com- pliant 2.4 GHz RF transceiver. It integrates the PHY and MAC functionality in a single chip solution. Figure 1-1 shows a simplified block diagram of a MRF24J40 wireless node. The MRF24J40 creates a low-cost, low-power, low data rate (250 or 625 kbps) Wireless Personal Area Network (WPAN) device. The MRF24J40 interfaces to many popular Microchip PIC® microcontrollers via a 4-wire serial SPI interface, interrupt, wake and Reset. The MRF24J40 provides hardware support for: •Energy Detection • Carrier Sense • Three CCA Modes • CSMA-CA Algorithm • Automatic Packet Retransmission • Automatic Acknowledgment • Independent Transmit, Beacon and GTS FIFO Buffers • Security Engine supports Encryption and Decryption for MAC Sublayer and Upper Layer These features reduce the processing load, allowing the use of low-cost 8-bit microcontrollers. The MRF24J40 is compatible with Microchip's ZigBee®, MiWi™ and MiWi P2P software stacks. Each software stack is available as a free download, includ- ing source code, from the Microchip web site: http://www.microchip.com/wireless. FIGURE 1-1: WIRELESS NODE BLOCK DIAGRAM Matching Circuitry Antenna I/O SDO SDI SCK INTx I/O I/O PIC ® MCU PHY MAC 20 MHz Crystal SDI SDO SCK INT WAKE CS RESET RFP RFN MRF24J40 Power Management Memory |
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