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M12L128168A Datasheet(PDF) 5 Page - Elite Semiconductor Memory Technology Inc. |
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M12L128168A Datasheet(HTML) 5 Page - Elite Semiconductor Memory Technology Inc. |
5 / 22 page ![]() ESMT M12L128168A Operation temperature condition -40 °C ~85°C Elite Semiconductor Memory Technology Inc. Publication Date: Oct. 2007 Revision: 1.2 5/43 AC OPERATING TEST CONDITIONS (VDD = 3.3V ± 0.3V,TA = -40 to 85 C ° ) Parameter Value Unit Input levels (Vih/Vil) 2.4/0.4 V Input timing measurement reference level 1.4 V Input rise and fall-time tr/tf = 1/1 ns Output timing measurement reference level 1.4 V Output load condition See Fig. 2 (Fig. 1) DC Output Load Circuit (Fig. 2) AC Output Load Circuit OPERATING AC PARAMETER (AC operating conditions unless otherwise noted) Version Parameter Symbol -5 -6 -7 Unit Note Row active to row active delay tRRD(min) 10 12 14 ns 1 RAS to CAS delay tRCD(min) 15 18 20 ns 1 Row precharge time tRP(min) 15 18 20 ns 1 tRAS(min) 38 40 42 ns 1 Row active time tRAS(max) 100 us @ Operating tRC(min) 53 58 63 ns 1 Row cycle time @ Auto refresh tRFC(min) 55 60 70 ns 1,5 Last data in to col. address delay tCDL(min) 1 tCK 2 Last data in to row precharge tRDL(min) 2 tCK 2 Last data in to burst stop tBDL(min) 1 tCK 2 Refresh period (4,096 rows) tREF(max) 64 ms 6 Output 870 VOH (DC) =2.4V , IOH = -2 mA VOL (DC) =0.4V , IOL = 2 mA Output 50pF Z0 =50 50pF 50 Vtt = 1.4V 3.3V 1200 Ω Ω Ω Ω |
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