M12L128168A datasheet(2/22 Pages) ESMT

Part #	M12L128168A

Description	2M x 16 Bit x 4 Banks Synchronous DRAM

Download	22 Pages

Scroll/Zoom	100%

Manufacturer	ESMT [Elite Semiconductor Memory Technology Inc.]

Direct Link	http://www.esmt.com.tw/index.asp

Logo

2 / 22 page

ESMT

M12L128168A

Operation temperature condition -40

°C ~85°C

Elite Semiconductor Memory Technology Inc.

Publication Date: Oct. 2007

Revision: 1.2

2/43

BLOCK DIAGRAM

PIN DESCRIPTION

NAME

INPUT FUNCTION

CLK

System Clock

Active on the positive going edge to sample all inputs

CS

Chip Select

Disables or enables device operation by masking or enabling all

inputs except CLK , CKE and L(U)DQM

CKE

Clock Enable

Masks system clock to freeze operation from the next clock cycle.

CKE should be enabled at least one cycle prior new command.

Disable input buffers for power down in standby.

A0 ~ A11

Address

Row / column address are multiplexed on the same pins.

Row address : RA0~RA11, column address : CA0~CA8

A12 , A13

Bank Select Address

Selects bank to be activated during row address latch time.

Selects bank for read / write during column address latch time.

RAS

Row Address Strobe

Latches row addresses on the positive going edge of the CLK with

RAS low. (Enables row access & precharge.)

CAS

Column Address Strobe

Latches column address on the positive going edge of the CLK with

CAS low. (Enables column access.)

WE

Write Enable

Enables write operation and row precharge.

Latches data in starting from CAS , WE active.

L(U)DQM

Data Input / Output Mask

Makes data output Hi-Z, tSHZ after the clock and masks the output.

Blocks data input when L(U)DQM active.

DQ0 ~ DQ15

Data Input / Output

Data inputs / outputs are multiplexed on the same pins.

VDD / VSS

Power Supply / Ground

Power and ground for the input buffers and the core logic.

VDDQ / VSSQ

Data Output Power / Ground

Isolated power supply and ground for the output buffers to provide

improved noise immunity.

N.C

No Connection

This pin is recommended to be left No Connection on the device.

L(U)DQM

DQ

Mode

Register

Column

Address

Buffer

&

Counter

Row

Address

Buffer

&

Refresh

Counter

Bank D

Bank A

Bank B

Bank C

Sense Amplifier

Column Decoder

Data Control Circuit

Address

Clock

Generator

CLK

CKE

CS

RAS

CAS

WE

Similar Part No. - M12L128168A

Manufacturer	Part #	Datasheet	Description
Elite Semiconductor Mem...	M12L128168A	808Kb / 44P	2M x 16 Bit x 4 Banks Synchronous DRAM
	M12L128168A	786Kb / 43P	2M x 16 Bit x 4 Banks Synchronous DRAM
	M12L128168A	673Kb / 45P	2M x 16 Bit x 4 Banks Synchronous DRAM
	M12L128168A-2N	692Kb / 46P	JEDEC standard 3.3V power supply
	M12L128168A-5BG	673Kb / 45P	2M x 16 Bit x 4 Banks Synchronous DRAM

More results

Similar Description - M12L128168A

Manufacturer	Part #	Datasheet	Description
AMIC Technology	A43L3616	865Kb / 41P	2M X 16 Bit X 4 Banks Synchronous DRAM
Elite Semiconductor Mem...	M12L128168A	786Kb / 43P	2M x 16 Bit x 4 Banks Synchronous DRAM
A-Data Technology	ADS7616A4A	565Kb / 8P	Synchronous DRAM(2M X 16 Bit X 4 Banks) Rev 1.0 April, 2001
Elite Semiconductor Mem...	M12L128168A	673Kb / 45P	2M x 16 Bit x 4 Banks Synchronous DRAM
	M52S128168A	1Mb / 47P	2M x 16 Bit x 4 Banks Synchronous DRAM
	M12L128168A	808Kb / 44P	2M x 16 Bit x 4 Banks Synchronous DRAM
	M52D128168A	1Mb / 47P	2M x 16 Bit x 4 Banks Synchronous DRAM
A-Data Technology	VDS7616A4A	576Kb / 8P	Synchronous DRAM(2M X 16 Bit X 4 Banks) Rev 1.0 April, 2001
AMIC Technology	A43L3616A	635Kb / 41P	2M x 16 Bit x 4 Banks Synchronous DRAM
Elite Semiconductor Mem...	M12S128168A	960Kb / 44P	2M x 16 Bit x 4 Banks Synchronous DRAM

More results

M12L128168A Datasheet(PDF) 2 Page - Elite Semiconductor Memory Technology Inc.

M12L128168A Datasheet(HTML) 2 Page - Elite Semiconductor Memory Technology Inc.

Similar Part No. - M12L128168A

Similar Description - M12L128168A

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

Datasheet Download

Link URL