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CDCE62002 Datasheet(PDF) 14 Page - Texas Instruments |
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CDCE62002 Datasheet(HTML) 14 Page - Texas Instruments |
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14 / 49 page  TIMING REQUIREMENTS PHASE NOISE ANALYSIS CDCE62002 SCAS882A – JUNE 2009 – REVISED JULY 2009.............................................................................................................................................................. www.ti.com over recommended ranges of supply voltage, load and operating free-air temperature range (unless otherwise noted) PARAMETER MIN TYP MAX UNIT REF_IN REQUIREMENTS fREF – Diff IN-DIV Maximum clock frequency applied to reference divider when (Register 0 Bit 9 = 1) 500 MHz (Reg 0 RAM bit 9 = 1) fREF – Diff REF_DIV Maximum clock frequency applied to reference divider when (Register 0 Bit 9 = 0) 250 MHz (Reg 0 RAM bit 9 = 0) fREF– Single For Single ended Inputs ( LVCMOS) on REF_IN 250 MHz Duty Cycle Single Duty cycle of REF_IN at VCC / 2 40% 60% Duty Cycle Diff Duty cycle of REF_IN at VCC / 2 40% 60% AUXILARY_IN REQUIREMENTS fREF – Single For Single ended Inputs (LVCMOS) on AUX_IN 2 75 MHz fREF – Crystal For Single ended Inputs (AT-Cut Crystal Input) 2 42 MHz PD REQUIREMENTS tr / tf Rise and fall time of the PD signal from 20% to 80% of VCC 4 ns Table 2. Phase Noise for 30.72MHz External Reference Phase Noise Specifications under following configuration: VCO = 1966.08 MHz, REF_IN = 30.72MHz, PFD Frequency = 30.72MHz, Charge Pump Current = 1.5mA Loop BW = 400kHz at 3.3V and 25°C. PHASE NOISE Reference LVPECL-HP LVPECL LVDS-HP LVDS LVCMOS-HP LVCMOS UNIT AT 30.72MHz 491.52MHz 491.52MHz 491.52MHz 491.52MHz 122.88MHz 122.88MHz 10Hz –108 –84 –84 –85 –85 –97 –97 dBc/Hz 100Hz –130 –98 –98 –98 –97 –110 –111 dBc/Hz 1kHz –134 –106 –106 –106 –106 –118 –118 dBc/Hz 10kHz –152 –118 –118 –118 –118 –130 –130 dBc/Hz 100kHz –156 –121 –121 –121 –121 –133 –133 dBc/Hz 1MHz –157 –131 –131 –130 –130 –143 –142 dBc/Hz 10MHz — –146 –146 –146 –145 –152 –151 dBc/Hz 20MHz — –146 –146 –146 –145 –152 –151 dBc/Hz Jitter(RMS) 195 319 316 332.4 332.2 366.5 372.1 fs 10k~20MHz (10k~20Mhz) Table 3. Phase Noise for 25MHz Crystal Reference Phase Noise Specifications under following configuration: VCO = 2000.00 MHz, AUX_IN -REF = 25.00MHz, PFD Frequency = 25.00MHz, Charge Pump Current = 1.5mA Loop BW = 400kHz 3.3V and 25°C. Phase Noise at Reference LVPECL-HP LVDS-HP LVCMOS-HP UNIT 25.00MHz 500.00MHz 250.00MHz 125.00MHz 10Hz — –72 –72 –79 dBc/Hz 100Hz — –97 –97 –103 dBc/Hz 1kHz — –111 –111 –118 dBc/Hz 10kHz — –120 –120 –126 dBc/Hz 100kHz — –124 –124 –130 dBc/Hz 1MHz — –136 –136 –142 dBc/Hz 10MHz — –147 –147 –151 dBc/Hz 20MHz — –148 –148 –151 dBc/Hz Jitter(RMS) — 426 426 443 fs 10k~20MHz 14 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): CDCE62002 |
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