TLC551, TLC551Y

LinCMOS

™ TIMERS

SLFS044A – FEBRUARY 1984 – REVISED MAY 1997

2

POST OFFICE BOX 655303

AVAILABLE OPTIONS

PACKAGED DEVICES

TA

VDD

RANGE

SMALL

OUTLINE

(D)

SSOP

(DB)

PLASTIC DIP

(P)

TSSOP

(PW)

CHIP FORM

(Y)

0

°C to 70°C

1 V to 16 V

TLC551CD

TLC551CDBLE

TLC551CP

TLC551CPWLE

TLC551Y

The D package is available taped and reeled. Add the suffix R (e.g., TLC551CDR). The DB and PW packages are only

available left-end taped and reeled (indicated by the LE suffix on the device type; e.g., TLC551CDBLE). Chips are

tested at 25

°C.

FUNCTION TABLE

RESET

VOLTAGE †

TRIGGER

VOLTAGE †

THRESHOLD

VOLTAGE †

OUTPUT

DISCHARGE

SWITCH

<MIN

Irrelevant

Irrelevant

Low

On

>MAX

<MIN

Irrelevant

High

Off

>MAX

>MAX

>MAX

Low

On

>MAX

>MAX

<MIN

As previously established

† For conditions shown as MIN or MAX, use the appropriate value specified under

electrical characteristics.

TLC551Y chip information

This chip, when properly assembled, displays characteristics similar to the TLC551. Thermal compression or

ultrasonic bonding may be used on the doped aluminum bonding pads. Chips may be mounted with conductive

epoxy or a gold-silicon preform.

BONDING PAD ASSIGNMENTS

50

64

GND

RESET

CONT

VDD

1

THRES

TRIG

R

R

R

DISCH

OUT

S

R

R1

RESET can override TRIG, which can override THRES.

CHIP THICKNESS: 15 TYPICAL

BONDING PADS: 4

× 4 MINIMUM

TJmax = 150°C

TOLERANCES ARE

±10%.

ALL DIMENSIONS ARE IN MILS.

PIN (1) IS INTERNALLY CONNECTED

TO BACKSIDE OF CHIP.

(5)

(6)

(2)

(1)

(7)

(4)

(8)

(3)