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SN54HC161 Datasheet(PDF) 3 Page - Texas Instruments |
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SN54HC161 Datasheet(HTML) 3 Page - Texas Instruments |
3 / 24 page SN54HC161, SN74HC161 4BIT SYNCHRONOUS BINARY COUNTERS SCLS297D − JANUARY 1996 − REVISED SEPTEMBER 2003 3 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 logic diagram (positive logic) 1 9 10 7 3 15 14 CLR LOAD ENT ENP CLK A RCO QA † For simplicity, routing of complementary signals LD and CK is not shown on this overall logic diagram. The uses of these signals are shown on the logic diagram of the D/T flip-flops. Pin numbers shown are for the D, J, N, NS, PW, and W packages. M1 G2 G4 3D 4R 1, 2T/1C3 4 13 B QB M1 G2 G4 3D 4R 1, 2T/1C3 5 12 C QC M1 G2 G4 3D 4R 1, 2T/1C3 6 11 D QD M1 G2 G4 3D 4R 1, 2T/1C3 2 LD† CK† CK R LD |
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