CD54AC163, CD74AC163

4-BIT SYNCHRONOUS BINARY COUNTERS

SCHS299 – APRIL 2000

4

POST OFFICE BOX 655303

logic symbol, each D/T flip-flop

M1

LD (Load)

Q (Output)

G2

TE (Toggle Enable)

CK (Clock)

G4

3D

4R

1, 2T/1C3

D (Inverted Data)

R (Inverted Reset)

logic diagram, each D/T flip-flop (positive logic)

TG

TG

TG

TG

TG

TG

CK

LD

TE

LD†

LD†

D

R

CK†

CK†

CK†

CK†

Q

† The origins of LD and CK are shown in the logic diagram of the overall device.