UAA145

TELEFUNKEN Semiconductors

Rev. A1, 29-May-96

2 (11)

General Description

The operation of the circuit is best explained with the help

of the block diagram shown in figure 1. It comprises a

synchronizing

stage,

ramp

generator,

voltage

com-parator, pulse generator, channel selecting stage and

two output amplifiers. The circuit diagram in figure 2 also

shows the external components and terminal connections

necessary for operation of the circuit.

As can be seen from figure 2, the circuit requires two

supply rails i.e. a +15 V and a –15 V. The positive voltage

is applied directly to Pin 1, while an external series

resistor in each line is used to connect the negative

voltage Pin 13 and Pin 15. In the following circuit

description each section of the block diagrams is

discussed separately.

Synchronization Stage

Pin 9 is connected, via a voltage divider (22 k

to the ac line (sync. signal source). A pulse is generated

during each zero crossover of the sync. input. The pulse

50 to 100

ms. (figure 2).

In addition to providing zero voltage switching pulses this

section of the circuit generates blocking signals for use in

the channel selecting stage.

Ramp Generator

i.e., to approximately 8.5 V, the charging time being

always less than the duration of the sync pulse. The

capacitor

discharges

via

resistor

half-cycle. The discharge voltage is of the same

To ensure an approximately linear ramp waveform, the

characteristics, the timing of the ramp zero crossover

point in relation to that of the sync. pulse is constant, and

consequently the pulse phasing rear limit is also very

stable.

Figure 2. Block diagram and basic circuit