EP2C35A15F324C6N datasheet(30/168 Pages) ALTERA

30 / 168 page

2–18

Altera Corporation

Cyclone II Device Handbook, Volume 1

February 2007

Global Clock Network & Phase-Locked Loops

Figure 2–11. EP2C5 & EP2C8 PLL, CLK[], DPCLK[] & Clock Control Block Locations

Note to Figure 2–11:

(1)

There are four clock control blocks on each side.

PLL 2

CLK[7..4]

DPCLK7

DPCLK6

CLK[3..0]

DPCLK0

DPCLK1

DPCLK10

DPCLK8

DPCLK2

GCLK[7..0]

DPCLK4

PLL 1

8

Clock Control

Block (1)

Clock Control

Block (1)

4

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