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EP2C35A15F324C6N Datasheet(PDF) 102 Page - Altera Corporation

Part # EP2C35A15F324C6N
Description  Cyclone II Device Family
Download  168 Pages
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Manufacturer  ALTERA [Altera Corporation]
Direct Link  http://www.altera.com
Logo ALTERA - Altera Corporation

EP2C35A15F324C6N Datasheet(HTML) 102 Page - Altera Corporation

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5–12
Altera Corporation
Cyclone II Device Handbook, Volume 1
February 2008
DC Characteristics for Different Pin Types
Table 5–11 specifies the bus hold parameters for general I/O pins.
On-Chip Termination Specifications
Table 5–12 defines the specifications for internal termination resistance
tolerance when using series or differential on-chip termination.
Table 5–11. Bus Hold Parameters
Note (1)
Parameter
Conditions
VCCIO Level
Unit
1.8 V
2.5 V
3.3 V
Min
Max
Min
Max
Min
Max
Bus-hold low, sustaining
current
VIN >
VIL(maximum)
30
—
50
—
70
—
μA
Bus-hold high, sustaining
current
VIN <
VIL(minimum)
–30
—
–50
—
–70
—
μA
Bus-hold low, overdrive
current
0 V < VIN < VCCIO
—
200
—
300
—
500
μA
Bus-hold high, overdrive
current
0 V < VIN < VCCIO
—
–200
—
–300
—
–500
μA
Bus-hold trip point (2)
—
0.68
1.07
0.7
1.7
0.8
2.0
V
Notes to Table 5–11:
(1)
There is no specification for bus-hold at VCCIO = 1.5 V for the HSTL I/O standard.
(2)
The bus-hold trip points are based on calculated input voltages from the JEDEC standard.
Table 5–12. Series On-Chip Termination Specifications
Symbol
Description
Conditions
Resistance Tolerance
Commercial
Max
Industrial
Max
Extended/
Automotive
Temp Max
Unit
25-
Ω R
S
Internal series termination without
calibration (25-
Ω setting)
VCCIO = 3.3V
±30
±30
±40
%
50-
Ω R
S
Internal series termination without
calibration (50-
Ω setting)
VCCIO = 2.5V
±30
±30
±40
%
50-
Ω RS
Internal series termination without
calibration (50-
Ω setting)
VCCIO = 1.8V
±30 (1)
±40
±50
%
Note to Table 5–12:
(1)
For commercial –8 devices, the tolerance is ±40%.


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