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EP2C35A15F324C6N Datasheet(PDF) 95 Page - Altera Corporation |
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EP2C35A15F324C6N Datasheet(HTML) 95 Page - Altera Corporation |
95 / 168 page ![]() Altera Corporation 5–5 February 2008 Cyclone II Device Handbook, Volume 1 DC Characteristics and Timing Specifications Single-Ended I/O Standards Tables 5–6 and 5–7 provide operating condition information when using single-ended I/O standards with Cyclone II devices. Table 5–5 provides descriptions for the voltage and current symbols used in Tables 5–6 and 5–7. Table 5–5. Voltage and Current Symbol Definitions Symbol Definition VCCI O Supply voltage for single-ended inputs and for output drivers VREF Reference voltage for setting the input switching threshold VIL Input voltage that indicates a low logic level VIH Input voltage that indicates a high logic level VOL Output voltage that indicates a low logic level VOH Output voltage that indicates a high logic level IOL Output current condition under which VOL is tested IOH Output current condition under which VOH is tested VTT Voltage applied to a resistor termination as specified by HSTL and SSTL standards Table 5–6. Recommended Operating Conditions for User I/O Pins Using Single-Ended I/O Standards Note (1) (Part 1 of 2) I/O Standard VCCIO (V) VREF (V) VIL (V) VIH (V) Min Typ Max Min Typ Max Max Min 3.3-V LVTTL and LVCMOS 3.135 3.3 3.465 — — — 0.8 1.7 2.5-V LVTTL and LVCMOS 2.375 2.5 2.625 — — — 0.7 1.7 1.8-V LVTTL and LVCMOS 1.710 1.8 1.890 — — — 0.35 × VCCIO 0.65 × VCCIO 1.5-V LVCMOS 1.425 1.5 1.575 — — — 0.35 × VCCIO 0.65 × VCCIO PCI and PCI-X 3.000 3.3 3.600 — — — 0.3 × VCCIO 0.5 × VCCIO SSTL-2 class I 2.375 2.5 2.625 1.19 1.25 1.31 VREF – 0.18 (DC) VREF – 0.35 (AC) VREF + 0.18 (DC) VREF + 0.35 (AC) SSTL-2 class II 2.375 2.5 2.625 1.19 1.25 1.31 VREF – 0.18 (DC) VREF – 0.35 (AC) VREF + 0.18 (DC) VREF + 0.35 (AC) SSTL-18 class I 1.7 1.8 1.9 0.833 0.9 0.969 VREF – 0.125 (DC) VREF – 0.25 (AC) VREF + 0.125 (DC) VREF + 0.25 (AC) |
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