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EP2C35A15F324C6N Datasheet(PDF) 80 Page - Altera Corporation |
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EP2C35A15F324C6N Datasheet(HTML) 80 Page - Altera Corporation |
80 / 168 page 3–6 Altera Corporation Cyclone II Device Handbook, Volume 1 February 2007 Configuration Schemes SRAM configuration elements allow Cyclone II devices to be reconfigured in-circuit by loading new configuration data into the device. With real-time reconfiguration, the device is forced into command mode with the nCONFIG pin. The configuration process loads different configuration data, reinitializes the device, and resumes user-mode operation. You can perform in-field upgrades by distributing new configuration files within the system or remotely. A built-in weak pull-up resistor pulls all user I/O pins to VCCIO before and during device configuration. The configuration pins support 1.5-V/1.8-V or 2.5-V/3.3-V I/O standards. The voltage level of the configuration output pins is determined by the VCCIO of the bank where the pins reside. The bank VCCIO selects whether the configuration inputs are 1.5-V, 1.8-V, 2.5-V, or 3.3-V compatible. Configuration Schemes You can load the configuration data for a Cyclone II device with one of three configuration schemes (see Table 3–4), chosen on the basis of the target application. You can use a configuration device, intelligent controller, or the JTAG port to configure a Cyclone II device. A low-cost configuration device can automatically configure a Cyclone II device at system power-up. Multiple Cyclone II devices can be configured in any of the three configuration schemes by connecting the configuration enable ( nCE) and configuration enable output ( nCEO) pins on each device. f For more information on configuration, see the Configuring Cyclone II Devices chapter of the Cyclone II Handbook, Volume 2. Table 3–4. Data Sources for Configuration Configuration Scheme Data Source Active serial (AS) Low-cost serial configuration device Passive serial (PS) Enhanced or EPC2 configuration device, MasterBlaster, ByteBlasterMV, ByteBlaster II or USB Blaster download cable, or serial data source JTAG MasterBlaster, ByteBlasterMV, ByteBlaster II or USB Blaster download cable or a microprocessor with a Jam or JBC file |
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