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EP2C35A15F324C6N Datasheet(PDF) 73 Page - Altera Corporation |
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EP2C35A15F324C6N Datasheet(HTML) 73 Page - Altera Corporation |
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73 / 168 page  Altera Corporation 2–61 February 2007 Cyclone II Device Handbook, Volume 1 Cyclone II Architecture 3.3 v (4) v v (6) v (6) v (6) v Notes to Table 2–20: (1) The PCI clamping diode must be disabled to drive an input with voltages higher than VCCIO. (2) These input values overdrive the input buffer, so the pin leakage current is slightly higher than the default value. To drive inputs higher than VCCIO but less than 4.0 V, disable the PCI clamping diode and turn on Allow voltage overdrive for LVTTL/LVCMOS input pins option in Device setting option in the Quartus II software. (3) When VCCIO = 1.8-V, a Cyclone II device can drive a 1.5-V device with 1.8-V tolerant inputs. (4) When VCCIO = 3.3-V and a 2.5-V input signal feeds an input pin or when VCCIO = 1.8-V and a 1.5-V input signal feeds an input pin, the VCCIO supply current will be slightly larger than expected. The reason for this increase is that the input signal level does not drive to the VCCIO rail, which causes the input buffer to not completely shut off. (5) When VCCIO = 2.5-V, a Cyclone II device can drive a 1.5-V or 1.8-V device with 2.5-V tolerant inputs. (6) When VCCIO = 3.3-V, a Cyclone II device can drive a 1.5-V, 1.8-V, or 2.5-V device with 3.3-V tolerant inputs. Table 2–20. Cyclone II MultiVolt I/O Support (Part 2 of 2) Note (1) VCCIO (V) Input Signal Output Signal 1.5 V 1.8 V 2.5 V 3.3 V 1.5 V 1.8 V 2.5 V 3.3 V |
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