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F85226 Datasheet(PDF) 36 Page - Feature Integration Technology Inc. |
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F85226 Datasheet(HTML) 36 Page - Feature Integration Technology Inc. |
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36 / 44 page  Fintek Feature Integration Technology Inc. F85226 July, 2007 V0.25P 31 F85226 8.47 MC Decoder Address High Byte Register – Index 0x3B Power-on default [7:0] =0000_0000b Bit Name R/W PWR Description 7-0 MC_DEC R/W VDD3V This register contains the address for KBC decoder. CR3A Bit [7..0] are used to define low byte of specify address. CR3B Bit [7..0] are used to define high byte of specify address. For example: Decoding address was set to be 0x062h when wrote 60h to CR3A and 00h to CR3B. 8.48 RTC Decoder Mask Register – Index 0x3C Power-on default [7:0] =0000_0001b Bit Name R/W PWR Description 7-0 RTC_ MASK R/W VDD3V This register is used to mask address bits (A7~A0) for specify address decoder, if the corresponding bit of this register is set to a 1, the corresponding address bit(A7~A0) is ignored by the specify address decoder. For example: If the decoding range is 0x070 & 0x071, you can set 0x070 to CR3D, 3E and 01h to CR3C. 8.49 RTC Decoder Address Low Byte Register – Index 0x3D Power-on default [7:0] =0111_0000b Bit Name R/W PWR Description 7-0 RTC_DEC R/W VDD3V This register contains the address for KBC decoder. CR3D Bit [7..0] are used to define low byte of specify address. CR3E Bit [7..0] are used to define high byte of specify address. For example: Decoding address was set to be 0x060h when wrote 70h to CR3D and 00h to CR3E. 8.50 RTC Decoder Address High Byte Register – Index 0x3E Power-on default [7:0] =0000_0000b Bit Name R/W PWR Description 7-0 RTC_DEC R/W VDD3V This register contains the address for KBC decoder. CR3D Bit [7..0] are used to define low byte of specify address. CR3E Bit [7..0] are used to define high byte of specify address. For example: Decoding address was set to be 0x060h when wrote 70h to CR3D and 00h to CR3E. |
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