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F85226 Datasheet(PDF) 35 Page - Feature Integration Technology Inc. |
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F85226 Datasheet(HTML) 35 Page - Feature Integration Technology Inc. |
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35 / 44 page  Fintek Feature Integration Technology Inc. F85226 July, 2007 V0.25P 30 F85226 8.43 KBC Decoder Address Low Byte Register – Index 0x37 Power-on default [7:0] =0110_0000b Bit Name R/W PWR Description 7-0 KBC_DEC R/W VDD3V This register contains the address for KBC decoder. CR37 Bit [7..0] are used to define low byte of specify address. CR38 Bit [7..0] are used to define high byte of specify address. For example: Decoding address was set to be 0x060h when wrote 60h to CR37 and 00h to CR38. 8.44 KBC Decoder Address High Byte Register – Index 0x38 Power-on default [7:0] =0000_0000b Bit Name R/W PWR Description 7-0 KBC_DEC R/W VDD3V This register contains the address for KBC decoder. CR37 Bit [7..0] are used to define low byte of specify address. CR38 Bit [7..0] are used to define high byte of specify address. For example: Decoding address was set to be 0x060h when wrote 60h to CR37 and 00h to CR38. 8.45 MC Decoder Mask Register – Index 0x39 Power-on default [7:0] =0000_0100b Bit Name R/W PWR Description 7-0 MC _MASK R/W VDD3V This register is used to mask address bits (A7~A0) for specify address decoder, if the corresponding bit of this register is set to a 1, the corresponding address bit(A7~A0) is ignored by the specify address decoder. For example: If the decoding range is 0x062 & 0x066, you can set 0x062 to CR3A, 3B and 04h to CR39. 8.46 MC Decoder Address Low Byte Register – Index 0x3A Power-on default [7:0] =0110_0010b Bit Name R/W PWR Description 7-0 MC_DEC R/W VDD3V This register contains the address for KBC decoder. CR3A Bit [7..0] are used to define low byte of specify address. CR3B Bit [7..0] are used to define high byte of specify address. For example: Decoding address was set to be 0x062h when wrote 60h to CR3A and 00h to CR3B. |
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