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F85226 Datasheet(PDF) 9 Page - Feature Integration Technology Inc. |
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F85226 Datasheet(HTML) 9 Page - Feature Integration Technology Inc. |
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9 / 44 page  Fintek Feature Integration Technology Inc. F85226 July, 2007 V0.25P 4 F85226 INt - TTL level input pin. INts - TTL level input pin and schmitt trigger. P - Power. 6.1 Power Pin Pin No. Pin Name Type Description 5, 20, 25, 45, 55, 70, 85, 105, 120 VDD3V P Standard Power Supply Voltage Input with 3.3V. 15, 30, 50, 60, 80, 95, 110, 125 GND P Ground. 6.2 Power on strapping signal Pin No Pin Name Type PWR Description 36 80PCS#/KBEN# I/OD24ts_u100k (5V-tolerance) VDD3v Power-on strapping with external pulled-down resistor 10k will enable K/B and mouse functions. When it is set, pin 38, 39 and 40 will execute IRQ1, KBCS# and MCCS# signals. 37 ROMCS#/ROM_EN I/O24ts (5V-tolerance) VDD3v Power-on strapping without internal resister, need external pulled-up resistor to enable CR03h (BIOS_ROM_EN bit) If there is a boot-ROM (BIOS). Else if without boot-ROM, please use external pulled-down 10K resister to disable this BIOS_ROM_EN. 126 DACK7#/RTCEN# I/O24ts_u100k (5V-tolerance) VDD3v Power-on strapping with external pulled-down 10k resistor will enable RTC functions. When it is set, pin 64 and 65 will do IRQ8 and RTCCS# signals. 128 DACK6#/HEFRAS I/O24ts_u100k (5V-tolerance) VDD3v Set this function will change the port that is used to access configuration registers. Default setting is 4Eh, but by power-on strapping with a external pulled-down 10k resister change to 2Eh. 2 DACK5#/EN_GP2X I/O24ts_u100k (5V-tolerance) VDD3v Power-on strapping with external pulled-down 10k resistor. Then it will disable LA [19:17] function and pin108~pin111, pin29 use as GPIO2X function. 6.3 LPC interface Pin No. Pin Name Type PWR Description 16-19 LAD[3:0] I/O24ts VDD3v Multiplexed command, address bi-directional data and cycle status. Through the LPC bus between a host and a peripheral. 13 LFRAME# INts VDD3v Low pulse indicates start of a new cycle or termination of broken cycle. 21 PCICLK INt VDD3v PCI clock used for the LPC bus. Same 33MHz clock as PCI clock on the host. Same clock phase with typical PCI skew. |
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