3

5194F–SEEPR–1/08

AT24C1024B

Figure 1-1.

Block Diagram

2. Pin Description

SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each EEPROM

device and negative edge clock data out of each device.

SERIAL DATA (SDA): The SDA pin is bi-directional for serial data transfer. This pin is open-

drain driven and may be wire-ORed with any number of other open-drain or open-collector

devices.

DEVICE/ADDRESSES (A1/A2): The A1, A2 pin is a device address input that can be hardwired

or left not connected for hardware compatibility with other AT24Cxx devices. When the A1, A2

pins are hardwired, as many as four 1024K devices may be addressed on a single bus system

(device addressing is discussed in detail under the Device Addressing section). If the A1/A2 pins

are left floating, the A1/A2 pin will be internally pulled down to GND if the capacitive coupling to

A1/A2 pin to GND.

WRITE PROTECT (WP): The write protect input, when connected to GND, allows normal write

If the pin is left floating, the WP pin will be internally pulled down to GND if the capacitive cou-

function.

START

STOP

LOGIC

VCC

GND

WP

SCL

SDA

A

2

A

1

A

0

SERIAL

CONTROL

LOGIC

EN

H.V. PUMP/TIMING

EEPROM

DATA RECOVERY

SERIAL MUX

D

LOGIC

COMP

LOAD

INC

DATA WORD

ADDR/COUNTER

Y DEC

R/W

D

OUT

D

IN

LOAD

DEVICE

ADDRESS

COMPARATOR