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UC3845BD1 Datasheet(PDF) 5 Page - STMicroelectronics |
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UC3845BD1 Datasheet(HTML) 5 Page - STMicroelectronics |
5 / 15 page ![]() Figure 1: Open Loop Test Circuit. RT A 2N2222 4.7K Ω 1K Ω ERROR AMP. ADJUST 4.7K Ω 5K Ω ISENSE ADJUST 100K Ω COMP V FB ISENSE RT/CT 1 2 3 4 C T 7 6 5 8 VREF V i OUTPUT GROUND 0.1 µF 0.1 µF VREF V i OUTPUT GROUND 1W 1K Ω D95IN343 High peak currents associated with capacitive loads necessitate careful grounding techniques. Timing and bypass capacitors should be connected close to pin 5 in a single point ground. The transistor and 5K Ω potentiometerareusedto samplethe oscillator waveform and apply an adjustable ramp to pin 3. 10K 20K 30K 50K 100K 200K 300K 500K fOSC(KHz) 1 2 5 10 20 50 D95IN333 CT=10nF CT=5nF CT=2nF C T =1nF C T =500pF C T=200pF C T =100pF Vi=15V TA=25°C RT (K Ω) 0.8 Figure 2: Timing Resistor vs. Oscillator Fre- quency 10K 20K 30K 50K 100K 200K 300K 500K fOSC(KHz) 1 2 3 5 10 20 30 50 % CT=10nF CT=5nF CT=2nF CT=1nF CT=500pF CT=200pF CT=100pF D95IN334 Vi=15V TA=25°C Figure 3: Output Dead-Time vs. Oscillator Fre- quency UC2842B UC2842B/3B/4B/5B - UC3842B/3B/4B/5B 5/15 |
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