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AT572D940HF-CJ Datasheet(PDF) 10 Page - ATMEL Corporation |
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AT572D940HF-CJ Datasheet(HTML) 10 Page - ATMEL Corporation |
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10 / 39 page  10 7010AS–DSP–07/07 AT572D940HF Preliminary PMC M_CK mAgicV Clock bi-03 output through PIO line for test purpose PMC P_CK0-P_CK3 Programmable Clock bi-03 output through PIO line SDRAMC SDCK SDRAM Clock Output out-03 SDRAMC SD_CKE SDRAM Clock Enable out-04 high SDRAMC SD_NCS SDRAM Chip Select out-03 low SDRAMC SD_BA0 - SD_BA1 SDRAM Bank Select out-03 SDRAMC SD_NWE SDRAM Write Enable out-04 low SDRAMC SD_NRAS - SD_NCAS Row and Column Address Strobe out-04 low SDRAMC SD_A10 SDRAM Bus Address bit 10 out-04 SMC NCS0 - NCS3 Chip Select Signal out-03 low 1 at reset; SMC NCS4 - NCS7 Chip Select Signal bi-03 low 1 at reset output through PIO line SMC NWR0 - NWR3 Write Signal out-03 low 1 at reset SMC NOE Output Enable out-03 low 1 at reset SMC NRD Read Signal out-03 low 1 at reset SMC NWE Write Enable out-03 low 1 at reset SMC NBS0 - NBS3 Byte Select out-03 low 1 at reset SM Logic SM_NOE SmartMedia Output Enable bi-03 low output through PIO line SM Logic SM_NWE SmartMedia Write Enable bi-03 low output through PIO line SPI SPI0_MOSI SPI 0 Master Out/Slave In data bi-03 through PIO line SPI SLV ! data input SPI MST ! data output SPI SPI0_MISO SPI 0 Master In/Slave Out data bi-03 through PIO line SPI SLV ! data output SPI MST ! data input SPI SPI0_NCS0 SPI 0 Input/Output Chip select out-03 low through PIO line SPI SLV ! CS Input SPI MST ! CS 0 Output SPI SPI0_NCS1 - SPI0_NCS3 SPI 0 Output Chip Selects bi-03 low output through PIO line SPI SLV ! n.a. SPI MST ! CS 3, 2, 1 Outputs SPI SPI0_CK SPI 0 Serial clock bi-03 through PIO line SPI SLV ! clock input SPI MST ! clock output Table 3-1. AT572D940HF Pin Description (Continued) Module Name Function Type Active Level Notes |
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