8

4378CS–AVR–09/08

AT90PWM1

4.2.5

Port E (PE2..0) RESET/ XTAL1/

XTAL2

Port E is an 3-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The

Port E output buffers have symmetrical drive characteristics with both high sink and source

capability. As inputs, Port E pins that are externally pulled low will source current if the pull-up

resistors are activated. The Port E pins are tri-stated when a reset condition becomes active,

even if the clock is not running.

If the RSTDISBL Fuse is programmed, PE0 is used as an I/O pin. Note that the electrical char-

acteristics of PE0 differ from those of the other pins of Port C.

If the RSTDISBL Fuse is unprogrammed, PE0 is used as a Reset input. A low level on this pin

for longer than the minimum pulse length will generate a Reset, even if the clock is not running.

The minimum pulse length is given in Table 9-1 on page 43. Shorter pulses are not guaranteed

to generate a Reset.

Depending on the clock selection fuse settings, PE1 can be used as input to the inverting Oscil-

lator amplifier and input to the internal clock operating circuit.

Depending on the clock selection fuse settings, PE2 can be used as output from the inverting

Oscillator amplifier.

The various special features of Port E are elaborated in “Alternate Functions of Port E” on page

71 and “Clock Systems and their Distribution” on page 27.

4.2.6

AVCC

AVCC is the supply voltage pin for the A/D Converter on Port F. It should be externally con-

through a low-pass filter.

4.2.7

AREF

This is the analog reference pin for the A/D Converter.

4.3

About Code Examples

This documentation contains simple code examples that briefly show how to use various parts of

the device. These code examples assume that the part specific header file is included before

compilation. Be aware that not all C compiler vendors include bit definitions in the header files

and interrupt handling in C is compiler dependent. Please confirm with the C compiler documen-

tation for more details.