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HD6432126R Datasheet(PDF) 30 Page - Renesas Technology Corp |
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HD6432126R Datasheet(HTML) 30 Page - Renesas Technology Corp |
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30 / 843 page  6 1.2 Internal Block Diagram An internal block diagram of the H8S/2128 Series is shown in figure 1.1, and an internal block diagram of the H8S/2124 Series in figure 1.2. P37/ D7 P36/ D6 P35/ D5 P34/ D4 P33/ D3 P32/ D2 P31/ D1 P30/ D0 P27/ A15/ PW15/SCK1/ CBLANK P26/ A14/ PW14/RxD1 P25/ A13/ PW13/TxD1 P24/ A12/ PW12/ SCL1 P23/ A11/ PW11/ SDA1 P22/ A10/ PW10 P21/ A9/ PW9 P20/ A8/ PW8 P17/ A7/ PW7 P16/ A6/ PW6 P15/ A5/ PW5 P14/ A4/ PW4 P13/ A3/ PW3 P12/ A2/ PW2 P11/ A1/ PW1/ PWX1 P10/ A0/ PW0/ PWX0 P52/ SCK0/ SCL0 P51/ RXD0 P50/ TXD0 AVCC AVSS P77/ AN7 P76/ AN6 P75/ AN5 P74/ AN4 P73/ AN3 P72/ AN2 P71/ AN1 P70/ AN0 P47/ WAIT/SDA0 P46/ ø/EXCL P45/ AS/IOS P44/ WR P43/ RD P42/ IRQ0 P41/ IRQ1 P40/ IRQ2/ADTRG P67/ TMOX/TMO1/CIN7/HSYNCO P66/ FTOB/TMRI1/CIN6/CSYNCI P65/ FTID/TMCI1/CIN5/HSYNCI P64/ FTIC/TMO0/CIN4/CLAMPO P63/ FTIB/TMRI0/CIN3/VFBACKI P62/ FTIA/CIN2/ VSYNCI/TMIY P61/ FTOA/CIN1/VSYNCO P60/ FTCI/TMCI0/CIN0/HFBACKI/TMIX ROM RAM WDT0, WDT1 8-bit timer × 4ch Timer connection (TMR0, TMR1, TMRX, TMRY) 8-bit PWM 14-bit PWM SCI × 2ch IIC × 2ch (option) 10-bit A/D 16-bit FRT VCC1 VCC2 VSS VSS MD1 MD0 EXTAL XTAL STBY RES NMI H8S/2000 CPU DTC Interrupt controller Figure 1.1 Internal Block Diagram of H8S/2128 Series |
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Similar Description - HD6432126R |
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