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HD6432126R Datasheet(PDF) 20 Page - Renesas Technology Corp |
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HD6432126R Datasheet(HTML) 20 Page - Renesas Technology Corp |
20 / 843 page ![]() xi 17.2.1 A/D Data Registers A to D (ADDRA to ADDRD) .............................................. 472 17.2.2 A/D Control/Status Register (ADCSR) ................................................................ 473 17.2.3 A/D Control Register (ADCR).............................................................................. 476 17.2.4 Keyboard Comparator Control Register (KBCOMP) ........................................... 477 17.2.5 Module Stop Control Register (MSTPCR) ........................................................... 478 17.3 Interface to Bus Master ...................................................................................................... 479 17.4 Operation ............................................................................................................................ 480 17.4.1 Single Mode (SCAN = 0)...................................................................................... 480 17.4.2 Scan Mode (SCAN = 1) ........................................................................................ 482 17.4.3 Input Sampling and A/D Conversion Time .......................................................... 484 17.4.4 External Trigger Input Timing .............................................................................. 485 17.5 Interrupts ............................................................................................................................ 485 17.6 Usage Notes........................................................................................................................ 486 Section 18 RAM.................................................................................................................... 493 18.1 Overview ............................................................................................................................ 493 18.1.1 Block Diagram ...................................................................................................... 493 18.1.2 Register Configuration .......................................................................................... 494 18.2 System Control Register (SYSCR) .................................................................................... 494 18.3 Operation ............................................................................................................................ 495 18.3.1 Expanded Mode (Modes 1, 2, and 3 (EXPE = 1)) ................................................ 495 18.3.2 Single-Chip Mode (Modes 2 and 3 (EXPE = 0)).................................................. 495 Section 19 ROM.................................................................................................................... 497 19.1 Overview ............................................................................................................................ 497 19.1.1 Block Diagram ...................................................................................................... 497 19.1.2 Register Configuration .......................................................................................... 498 19.2 Register Descriptions.......................................................................................................... 498 19.2.1 Mode Control Register (MDCR) .......................................................................... 498 19.3 Operation ............................................................................................................................ 499 19.4 Overview of Flash Memory................................................................................................ 500 19.4.1 Features ................................................................................................................. 500 19.4.2 Block Diagram ...................................................................................................... 501 19.4.3 Flash Memory Operating Modes .......................................................................... 502 19.4.4 Pin Configuration .................................................................................................. 506 19.4.5 Register Configuration .......................................................................................... 506 19.5 Register Descriptions.......................................................................................................... 507 19.5.1 Flash Memory Control Register 1 (FLMCR1)...................................................... 507 19.5.2 Flash Memory Control Register 2 (FLMCR2)...................................................... 509 19.5.3 Erase Block Registers 1 and 2 (EBR1, EBR2)...................................................... 510 19.5.4 Serial/Timer Control Register (STCR) ................................................................. 511 19.6 On-Board Programming Modes ......................................................................................... 513 19.6.1 Boot Mode............................................................................................................. 513 |
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