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HD6432126R Datasheet(PDF) 19 Page - Renesas Technology Corp |
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HD6432126R Datasheet(HTML) 19 Page - Renesas Technology Corp |
19 / 843 page x 15.3.2 Operation in Asynchronous Mode ........................................................................ 379 15.3.3 Multiprocessor Communication Function ............................................................ 391 15.3.4 Operation in Synchronous Mode .......................................................................... 399 15.4 SCI Interrupts ..................................................................................................................... 408 15.5 Usage Notes........................................................................................................................ 409 Section 16 I 2C Bus Interface (IIC) [H8S/2128 Series Option] ............................... 413 16.1 Overview ............................................................................................................................ 413 16.1.1 Features ................................................................................................................. 413 16.1.2 Block Diagram ...................................................................................................... 414 16.1.3 Input/Output Pins .................................................................................................. 416 16.1.4 Register Configuration.......................................................................................... 417 16.2 Register Descriptions.......................................................................................................... 418 16.2.1 I 2C Bus Data Register (ICDR) .............................................................................. 418 16.2.2 Slave Address Register (SAR) .............................................................................. 421 16.2.3 Second Slave Address Register (SARX) .............................................................. 422 16.2.4 I 2C Bus Mode Register (ICMR)............................................................................ 423 16.2.5 I 2C Bus Control Register (ICCR).......................................................................... 426 16.2.6 I 2C Bus Status Register (ICSR)............................................................................. 433 16.2.7 Serial/Timer Control Register (STCR) ................................................................. 438 16.2.8 DDC Switch Register (DDCSWR) ....................................................................... 439 16.2.9 Module Stop Control Register (MSTPCR) ........................................................... 441 16.3 Operation ............................................................................................................................ 442 16.3.1 I 2C Bus Data Format.............................................................................................. 442 16.3.2 Master Transmit Operation ................................................................................... 444 16.3.3 Master Receive Operation ..................................................................................... 446 16.3.4 Slave Receive Operation ....................................................................................... 448 16.3.5 Slave Transmit Operation...................................................................................... 450 16.3.6 IRIC Setting Timing and SCL Control ................................................................. 452 16.3.7 Automatic Switching from Formatless Mode to I 2C Bus Format......................... 453 16.3.8 Operation Using the DTC ..................................................................................... 454 16.3.9 Noise Canceler ...................................................................................................... 455 16.3.10 Sample Flowcharts ................................................................................................ 455 16.3.11 Initialization of Internal State................................................................................ 459 16.4 Usage Notes........................................................................................................................ 461 Section 17 A/D Converter .................................................................................................. 469 17.1 Overview ............................................................................................................................ 469 17.1.1 Features ................................................................................................................. 469 17.1.2 Block Diagram ...................................................................................................... 470 17.1.3 Pin Configuration .................................................................................................. 471 17.1.4 Register Configuration .......................................................................................... 472 17.2 Register Descriptions.......................................................................................................... 472 |
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