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HD6432126R Datasheet(PDF) 11 Page - Renesas Technology Corp |
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HD6432126R Datasheet(HTML) 11 Page - Renesas Technology Corp |
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11 / 843 page  ii 2.8.6 Power-Down State ................................................................................................ 66 2.9 Basic Timing ...................................................................................................................... 67 2.9.1 Overview ............................................................................................................... 67 2.9.2 On-Chip Memory (ROM, RAM) .......................................................................... 67 2.9.3 On-Chip Supporting Module Access Timing........................................................ 69 2.9.4 External Address Space Access Timing................................................................ 70 2.10 Usage Note ......................................................................................................................... 70 2.10.1 TAS Instruction ..................................................................................................... 70 2.10.2 STM/LDT Instruction ........................................................................................... 70 Section 3 MCU Operating Modes.................................................................................... 73 3.1 Overview ............................................................................................................................ 73 3.1.1 Operating Mode Selection .................................................................................... 73 3.1.2 Register Configuration .......................................................................................... 74 3.2 Register Descriptions.......................................................................................................... 74 3.2.1 Mode Control Register (MDCR) .......................................................................... 74 3.2.2 System Control Register (SYSCR) ....................................................................... 75 3.2.3 Bus Control Register (BCR) ................................................................................. 77 3.2.4 Serial/Timer Control Register (STCR) ................................................................. 78 3.3 Operating Mode Descriptions ............................................................................................ 80 3.3.1 Mode 1 .................................................................................................................. 80 3.3.2 Mode 2 .................................................................................................................. 80 3.3.3 Mode 3 .................................................................................................................. 80 3.4 Pin Functions in Each Operating Mode.............................................................................. 81 3.5 Memory Map in Each Operating Mode.............................................................................. 81 Section 4 Exception Handling........................................................................................... 89 4.1 Overview ............................................................................................................................ 89 4.1.1 Exception Handling Types and Priority................................................................ 89 4.1.2 Exception Handling Operation.............................................................................. 90 4.1.3 Exception Sources and Vector Table .................................................................... 90 4.2 Reset ................................................................................................................................... 92 4.2.1 Overview ............................................................................................................... 92 4.2.2 Reset Sequence...................................................................................................... 92 4.2.3 Interrupts after Reset ............................................................................................. 94 4.3 Interrupts ............................................................................................................................ 95 4.4 Trap Instruction .................................................................................................................. 96 4.5 Stack Status after Exception Handling ............................................................................... 97 4.6 Notes on Use of the Stack .................................................................................................. 98 Section 5 Interrupt Controller............................................................................................ 99 5.1 Overview ............................................................................................................................ 99 5.1.1 Features ................................................................................................................. 99 |
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