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HD6432126R Datasheet(PDF) 56 Page - Renesas Technology Corp |
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HD6432126R Datasheet(HTML) 56 Page - Renesas Technology Corp |
56 / 843 page 32 Stack Structure: When the program counter (PC) is pushed onto the stack in a subroutine call, and the PC and condition-code register (CCR) are pushed onto the stack in exception handling, they are stored as shown in figure 2.3. The extended control register (EXR) is not pushed onto the stack. For details, see section 4, Exception Handling. (a) Subroutine Branch (b) Exception Handling PC (16 bits) CCR CCR* PC (16 bits) SP Note: * Ignored when returning. SP Figure 2.3 Stack Structure in Normal Mode (2) Advanced Mode Address Space: Linear access is provided to a 16-Mbyte maximum address space (architecturally a maximum 16-Mbyte program area and a maximum 4-Gbyte data area, with a maximum of 4 Gbytes for program and data areas combined). Extended Registers (En): The extended registers (E0 to E7) can be used as 16-bit registers, or as the upper 16-bit segments of 32-bit registers or address registers. Instruction Set: All instructions and addressing modes can be used. |
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