M30620FCAFP datasheet(321/615 Pages) RENESAS

321 / 615 page

Mitsubishi microcomputers

M16C / 62A Group

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Protect

2-4

2.1.2 Protect Operation

The following explains the protect operation. Figure 2.1.2 shows the set-up procedure.

(1) Setting “1” in the write-enable bit of system clock control registers 0 and 1 causes system

clock control register 0 and system clock control register 1 to be in write-enabled state.

(2) The contents of system clock control register 0 and that of system clock control register 1 are changed.

(3) Setting “0” in the write-enable bit of system control registers 0 and 1 causes system clock

control register 0 and system control register 1 to be in write-inhibited state.

(4) To change the contents of processor mode register 0 and that of processor mode register 1,

follow the same steps as in dealing with system clock control registers.

(5) The write-enable bit of port 9 direction register and SI/Oi control register (i=3,4) goes to “0”

when the next write instruction is executed after write-enabled state is readied. Make

changes in input/output and SI/Oi control register (i=3,4) immediately after the instruction that

sets “1” in the write-enable bit of port P9 direction register and SI/Oi control register

(i=3,4)(avoid causing an interrupt). Also take measures to prevent DMA transfer from being

executed.

Operation

M30620FCAFP Datasheet(PDF) 321 Page - Renesas Technology Corp