M30620FCAFP datasheet(479/615 Pages) RENESAS

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Key-Input Interrupt

Mitsubishi microcomputers

M16C / 62A Group

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

2-162

Figure 2.13.1. Memory map of key-input interrupt-related registers

2.13 Key-Input Interrupt Usage

Port P10 direction register (PD10)

Pull-up control register 2 (PUR2)

004D16

03F616

03FE16

Key input interrupt control register(KUPIC)

2.13.1 Overview of the key-input interrupt usage

Key-input interrupt occurs when a falling edge is input to P104 through P107. The following is an overview

of the key-input interrupt usage:

(1) Enabling/disabling the key-input interrupt

The key-input interrupt can be enabled and disabled using the key-input interrupt register. The key-

input interrupt is affected by the interrupt priority level (IPL) and the interrupt enable flag (I flag).

(2) Occurrence timing of the key-input interrupt

With key-input interrupt acceptance enabled, pins P104 through P107, which are set to input, become

_____

key-input interrupt pins (KI0 through KI3). A key-input interrupt occurs when a falling edge is input to a

key-input interrupt pin. At this moment, the level of other key-input interrupt pins must be “H”. No

interrupt occurs when the level of other key-input interrupt pins is “L”.

(3) How to determine a key-input interrupt

A key-input interrupt occurs when a falling edge is input to one of four pins, but each pin has the same

vector address.

Therefore, read the input level of pins P104 through P107 in the key-input interrupt routine to deter-

mine the interrupted pin.

(4) Registers related to the key-input interrupt

Figure 2.13.1 shows the memory map of key-input interrupt-related registers, and Figure 2.13.2

shows key-input interrupt-related registers.

M30620FCAFP Datasheet(PDF) 479 Page - Renesas Technology Corp