M30620FCAFP datasheet(371/615 Pages) RENESAS

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Clock-Synchronous Serial I/O

Mitsubishi microcomputers

M16C / 62A Group

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

2-54

Following are some examples in which various functions (a) through (g) are selected:

_______

• Transmission Operation WITH: CTS function, transmission at falling edge of transfer clock, LSB

First, interrupt at instant transmission buffer is emptied; WITHOUT transfer clock output to multiple

pins function ........................................................................................................................... P2-60

_______ _______

• Transmission Operation WITH: CTS/RTS function disabled, transmission at falling edge of transfer

clock, LSB First, interrupt at instant transmission is completed; WITH transfer clock output to mul-

tiple pins function (UART0 selection available) ...................................................................... P2-64

_______

• Reception WITH: RTS function, reception at falling edge of transfer clock, LSB First, successive

reception mode disabled; WITHOUT transfer clock output to multiple pins function ............. P2-68

(6) Input to the serial I/O and the direction register

To input an external signal to the serial I/O, set the direction register of the relevant port to input.

(7) Pins related to the serial I/O

_______

________

• CTS0, CTS1, CTS2 pins

_______

Input pins for the CTS function

________

• RTS0, RTS1, RTS2 pins

_______

Output pins for the RTS function

• CLK0, CLK1, CLK2 pins

Input/output pins for the transfer clock

• RxD0, RxD1, RxD2 pins

Input pins for data

• TxD0, TxD1, TxD2 pins

Output pins for data (Since TXD2 pin is N-channel open drain, this pin

needs pull-up resistor.)

• CLKS1 pin

Output pin for transfer clock. Can be used as transfer clock output pin in

the transfer clock output to multiple pins function.

(8) Registers related to the serial I/O

Figure 2.4.1 shows the memory map of serial I/O-related registers, and Figures 2.4.2 to 2.4.6 show

serial I/O-related registers.

Figure 2.4.1. Memory map of serial I/O-related registers

UART0 transmit/receive mode register (U0MR)

UART0 transmit buffer register (U0TB)

UART0 receive buffer register (U0RB)

UART1 transmit/receive mode register (U1MR)

UART1 transmit buffer register (U1TB)

UART1 receive buffer register (U1RB)

UART0 bit rate generator (U0BRG)

UART0 transmit/receive control register 0 (U0C0)

UART0 transmit/receive control register 1 (U0C1)

UART1 bit rate generator (U1BRG)

UART1 transmit/receive control register 0 (U1C0)

UART1 transmit/receive control register 1 (U1C1)

UART transmit/receive control register 2 (UCON)

03A016

03A116

03A216

03A316

03A416

03A516

03A616

03A716

03A816

03A916

03AA16

03AB16

03AC16

03AD16

03AE16

03AF16

03B016

03B116

004F16

005016

005116

005216

005316

005416

UART0 transmit interrupt control register (S0TIC)

UART0 receive interrupt control register (S0RIC)

UART1 transmit interrupt control regster(S1TIC)

UART1 receive interrupt control register(S1RIC)

UART2 transmit interrupt control register (S2TIC)

UART2 receive interrupt control register (S2RIC)

UART2 transmit/receive mode register (U2MR)

UART2 transmit buffer register (U2TB)

UART2 receive buffer register (U2RB)

UART2 bit rate generator (U2BRG)

UART2 transmit/receive control register 0 (U2C0)

UART2 transmit/receive control register 1 (U2C1)

037816

037916

037A16

037B16

037C16

037D16

037E16

037F16

M30620FCAFP Datasheet(PDF) 371 Page - Renesas Technology Corp

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