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H8SX1663 Datasheet(PDF) 836 Page - Renesas Technology Corp |
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H8SX1663 Datasheet(HTML) 836 Page - Renesas Technology Corp |
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836 / 1158 page ![]() Section 16 USB Function Module (USB) Rev.1.00 Jun. 07, 2006 Page 784 of 1102 REJ09B0294-0100 16.3.27 Transceiver Test Register 1 (TRNTREG1) TRNTREG1 is a test register that can monitor the on-chip transceiver input signal. Setting bits PTSTE and txenl in TRNTREG0 to 1 enables monitoring the on-chip transceiver input signal. Table 16.5 shows the relationship between pin input and TRNTREG1 monitoring value. Bit Bit Name Initial Value R/W 7 0 R 6 0 R 5 0 R 4 0 R 3 0 R 2 xver_data * R 1 dpls * R 0 dmns * R Bit Bit Name Initial Value R/W Description 7 to 3 All 0 R Reserved These bits are always read as 0. The write value should always be 0. 2 1 0 xver_data dpls dmns * * * R R R On-Chip Transceiver Input Signal Monitor xver_data: Monitors the differential input level (xver_data) signal of the on-chip transceiver. dpls: Monitors the USD+ (dpls) signal of the on- chip transceiver. dmns: Monitors the USD- (dmns) signal of the on- chip transceiver. Note: * Determined by the state of pins, VBUS, USD+, and USD- |
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