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H8SX1663 Datasheet(PDF) 787 Page - Renesas Technology Corp |
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H8SX1663 Datasheet(HTML) 787 Page - Renesas Technology Corp |
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787 / 1158 page ![]() Section 15 Serial Communication Interface (SCI, IrDA, CRC) Rev.1.00 Jun. 07, 2006 Page 735 of 1102 REJ09B0294-0100 (3) High-Level Pulse Width Selection Table 15.13 shows possible settings for bits IrCKS2 to IrCKS0 (minimum pulse width), and this LSI's operating frequencies and bit rates, for making the pulse width shorter than 3/16 times the bit rate in transmission. Table 15.13 IrCKS2 to IrCKS0 Bit Settings Operating Bit Rate (bps) (Upper Row)/Bit Interval × 3/16 (µs) (Lower Row) Frequency 2400 9600 19200 38400 57600 115200 P φ (MHz) 78.13 19.53 9.77 4.88 3.26 1.63 7.3728 100 100 100 100 100 100 8 100 100 100 100 100 100 9.8304 100 100 100 100 100 100 10 100 100 100 100 100 100 12 101 101 101 101 101 101 12.288 101 101 101 101 101 101 14 101 101 101 101 101 101 14.7456 101 101 101 101 101 101 16 101 101 101 101 101 101 17.2032 101 101 101 101 101 101 18 101 101 101 101 101 101 19.6608 101 101 101 101 101 101 20 101 101 101 101 101 101 25 110 110 110 110 110 110 30 110 110 110 110 110 110 33 110 110 110 110 110 110 35 110 110 110 110 110 110 |
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