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H8SX1663 Datasheet(PDF) 737 Page - Renesas Technology Corp |
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H8SX1663 Datasheet(HTML) 737 Page - Renesas Technology Corp |
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737 / 1158 page  Section 15 Serial Communication Interface (SCI, IrDA, CRC) Rev.1.00 Jun. 07, 2006 Page 685 of 1102 REJ09B0294-0100 Table 15.6 Maximum Bit Rate with External Clock Input (Asynchronous Mode) P φ (MHz) External Input Clock (MHz) Maximum Bit Rate (bit/s) P φ (MHz) External Input Clock (MHz) Maximum Bit Rate (bit/s) 8 2.0000 125000 17.2032 4.3008 268800 9.8304 2.4576 153600 18 4.5000 281250 10 2.5000 156250 19.6608 4.9152 307200 12 3.0000 187500 20 5.0000 312500 12.288 3.0720 192000 25 6.2500 390625 14 3.5000 218750 30 7.5000 468750 14.7456 3.6864 230400 33 8.2500 515625 16 4.0000 250000 35 8.7500 546875 Note: In SCI_2, this is an example when the ABCS bit in SEMR_2 is 0. When the ABCS bit is set to 1, the bit rate is two times. |
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