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H8SX1663 Datasheet(PDF) 619 Page - Renesas Technology Corp |
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H8SX1663 Datasheet(HTML) 619 Page - Renesas Technology Corp |
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619 / 1158 page  Section 10 16-Bit Timer Pulse Unit (TPU) Rev.1.00 Jun. 07, 2006 Page 567 of 1102 REJ09B0294-0100 (2) Output Compare Output Timing A compare match signal is generated in the final state in which TCNT and TGR match (the point at which the count value matched by TCNT is updated). When a compare match signal is generated, the output value set in TIOR is output at the output compare output pin (TIOC pin). After a match between TCNT and TGR, the compare match signal is not generated until the TCNT input clock is generated. Figure 10.32 shows output compare output timing. P φ TCNT input clock TCNT N + 1 N Compare match signal TIOC pin TGR N Figure 10.32 Output Compare Output Timing (3) Input Capture Signal Timing Figure 10.33 shows input capture signal timing. P φ TCNT N + 1 N TGR Input capture input Input capture signal N + 2 N N + 2 Figure 10.33 Input Capture Input Signal Timing |
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