Electronic Components Datasheet Search |
|
M37151M6 Datasheet(PDF) 33 Page - Renesas Technology Corp |
|
|
M37151M6 Datasheet(HTML) 33 Page - Renesas Technology Corp |
33 / 138 page M37151M6/M8/MA/MC/MF-XXXFP, M37151EFFP Rev.1.00 Nov 01, 2002 page 33 of 136 REJ03B0129-0100Z 8.6.4 I2C Control Register The I2C control register (address 00F916) controls the data commu- nication format. (1) Bits 0 to 2: bit counter (BC0–BC2) These bits decide the number of bits for the next 1-byte data to be transmitted. An interrupt request signal occurs immediately after the number of bits specified with these bits are transmitted. When a START condition is received, these bits become “0002” and the address data is always transmitted and received in 8 bits. (2) Bit 3: I2C interface use enable bit (ESO) This bit enables usage of the multimaster I2C BUS interface. When this bit is set to “0,” interface is in the disable status, so the SDA and the SCL become high-impedance. When the bit is set to “1,” use of the interface is enabled. When ESO = “0,” the following is performed. • PIN = “1,” BB = “0” and AL = “0” are set (they are bits of the I2C status register at address 00F816 ). • Writing data to the I2C data shift register (address 00F616) is dis- abled. (3) Bit 4: data format selection bit (ALS) This bit decides whether or not to recognize slave addresses. When this bit is set to “0,” the addressing format is selected, so that ad- dress data is recognized. When a match is found between a slave address and address data as a result of comparison or when a gen- eral call (refer to “8.6.5 I2C Status Register,” bit 1) is received, trans- mission processing can be performed. When this bit is set to “1,” the free data format is selected, so that slave addresses are not recog- nized. (4) Bit 5: addressing format selection bit (10BIT SAD) This bit selects a slave address specification format. When this bit is set to “0,” the 7-bit addressing format is selected. In this case, only the high-order 7 bits (slave address) of the I2C address register (ad- dress 00F716) are compared with address data. When this bit is set to “1,” the 10-bit addressing format is selected and all the bits of the I2C address register are compared with the address data. (5) Bits 6 and 7: connection control bits between I2C-BUS interface and ports (BSEL0, BSEL1) These bits control the connection between SCL and ports or SDA and ports (refer to Figure 8.6.5). Note: To connect with SCL3 and SDA3, set bits 2 and 3 of the port P3 register (00C616) . Fig. 8.6.5 Connection Port Control by BSEL0 and BSEL1 BSEL0 BSEL1 BSEL0 SCL1/P11 SCL2/P12 SDA1/P13 SDA2/P14 BSEL1 SCL SDA “1” “0” “1” SCL3/P31 SDA3/P30 BSEL20 BSEL20 “0” “1” “0” “1” “0” “1” “0” “1” “0” “1” “0” “1” BSEL21 BSEL21 “0” Multi-master I2C-BUS interface Notes • The paths SCL1, SCL2, SDA1, and SDA2, as well as the paths SCL3 and SDA3 cannot be connected at the same time. • Port P3 Register (address 00C616) bit 3 is used to control the pin connections of SCL3/P31 and SCL1/P11 and those of SDA3/P30 and SDA1/P13. • Set the corresponding direction register to "1" to use the port as multi-master I 2C-BUS interface. |
Similar Part No. - M37151M6 |
|
Similar Description - M37151M6 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |