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M37151M6 Datasheet(PDF) 23 Page - Renesas Technology Corp |
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M37151M6 Datasheet(HTML) 23 Page - Renesas Technology Corp |
23 / 138 page M37151M6/M8/MA/MC/MF-XXXFP, M37151EFFP Rev.1.00 Nov 01, 2002 page 23 of 136 REJ03B0129-0100Z Fig. 8.4.2 Timer Mode Register 2 b6 b5 b4 b3 b2 b1 b0 Timer mode register 2 (TM2) [Address 00F516] B After reset RW 0 Name Functions Timer 3 count source selection bit (TM20) 0 RW 1, 4 Timer 4 count source selection bits (TM21, TM24) 0R W 2 3 0 Timer 3 count stop bit (TM22) 0: Count start 1: Count stop Timer 4 count stop bit (TM23) 0: Count start 1: Count stop 0 0 5 Timer 5 count stop bit (TM25) 0: Count start 1: Count stop 0 6 Timer 6 count stop bit (TM26) 0: Count start 1: Count stop 0 RW RW RW RW RW 7 Timer 5 count source selection bit 1 (TM27) 0: f(XIN)/16 or f(XCIN)/16 (See note) 1: Count source selected by bit 6 of TM1 b0 0 0 : f(XIN)/16 or f(XCIN)/16 (See note) 1 0 : f(XCIN) 01 : 11 : (b6 at address 00C7 16) External clock from TIM3 pin b4 b1 0 0 : Timer 3 overflow signal 0 1 : f(XIN)/16 or f(XCIN)/16 (See note) 1 0 : f(XIN)/2 or f(XCIN)/2 (See note) 1 1 : f(XCIN) Note: Either f(XIN) or f(XCIN) is selected by bit 7 of the CPU mode register. b7 Timer Mode Register 2 Fig. 8.4.1 Timer Mode Register 1 b7 b6 b5 b4 b3 b2 b1 b0 Timer mode register 1 (TM1) [Address 00F4 16] B After reset W Timer Mode Register 1 0 1 2 3 4 Name Functions Timer 1 count source selection bit 1 (TM10) 0: f(XIN)/16 or f(XCIN)/16 (See note) 1: Count source selected by bit 5 of TM1 Timer 2 count source selection bit 1 (TM11) 0: Count source selected by bit 4 of TM1 1: External clock from TIM2 pin Timer 1 count stop bit (TM12) 0: Count start 1: Count stop Timer 2 count stop bit (TM13) 0: Count start 1: Count stop Timer 2 count source selection bit 2 (TM14) R 0 0 0 0 0 W R W R W R W R W R 0: f(XIN)/16 or f(XCIN)/16 (See note) 1: Timer 1 overflow 5 Timer 1 count source selection bit 2 (TM15) 0: f(XIN)/4096 or f(XCIN)/4096 (See note) 1: External clock from TIM2 pin 0W R 6 Timer 5 count source selection bit 2 (TM16) 0: Timer 2 overflow 1: Timer 4 overflow 0W R 7 Timer 6 internal count source selection bit (TM17) 0W R 0: f(XIN)/16 or f(XCIN)/16 (See note) 1: Timer 5 overflow Note: Either f(XIN) or f(XCIN) is selected by bit 7 of the CPU mode register. |
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