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M37151M6 Datasheet(PDF) 98 Page - Renesas Technology Corp |
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M37151M6 Datasheet(HTML) 98 Page - Renesas Technology Corp |
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98 / 138 page  M37151M6/M8/MA/MC/MF-XXXFP, M37151EFFP Rev.1.00 Nov 01, 2002 page 98 of 136 REJ03B0129-0100Z 8.17 ADDRESSING MODE The memory access is reinforced with 17 kinds of addressing modes. Refer to SERIES 740 <Software> User’s Manual for details. 8.18 MACHINE INSTRUCTIONS There are 71 machine instructions. Refer to SERIES 740 <Software> User’s Manual for details. 9. TECHNICAL NOTES • The divide ratio of the timer is 1/(n+1). • Even though the BBC and BBS instructions are executed imme- diately after the interrupt request bits are modified (by the pro- gram), those instructions are only valid for the contents before the modification. At least one instruction cycle is needed (such as an NOP) between the modification of the interrupt request bits and the execution of the BBC and BBS instructions. • After the ADC and SBC instructions are executed (in the decimal mode), one instruction cycle (such as an NOP) is needed before the SEC, CLC, or CLD instruction is executed. • An NOP instruction is needed immediately after the execution of a PLP instruction. • In order to avoid noise and latch-up, connect a bypass capacitor ( ≈ 0.1µF) directly between the VCC pin–VSS pin and the VCC pin– CNVSS pin, using a thick wire. • Characteristic value, margin of operation, etc. of versions with built-in EPROM and built-in mask ROM may differ from each other within the limits of the electrical characteristics in terms of manu- facturing process, built-in ROM, difference of a layout pattern, etc. Carry out and check an examination equivalent to the system evaluation examination carried out on the EPROM version when replacing it with the mask ROM version. 8.16 AUTO-CLEAR CIRCUIT When a power source is supplied, the auto-clear function will oper- ate by connecting the following circuit to the RESET pin. Fig.8.16.1 Auto-clear Circuit Example RESET Vss Vcc Circuit example 1 RESET Vss Vcc Circuit example 2 Note : Make the level change from “L” to “H” at the point at which the power source voltage exceeds the specified voltage. |
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