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M37151M6 Datasheet(PDF) 96 Page - Renesas Technology Corp |
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M37151M6 Datasheet(HTML) 96 Page - Renesas Technology Corp |
96 / 138 page M37151M6/M8/MA/MC/MF-XXXFP, M37151EFFP Rev.1.00 Nov 01, 2002 page 96 of 136 REJ03B0129-0100Z Fig.8.14.5 State Transitions of System Clock Reset The example assumes that 8 MHz is being applied to the XIN pin and 32 kHz to the XCIN pin. The φ indicates the internal clock. WIT instruction CM7 : Internal system clock selection bit 0 : XIN-XOUT selected (high-speed mode) 1 : XCIN-XCOUT selected (low-speed mode) CPU mode register (Address : 00FB16) CM6 : Main clock (XIN–XOUT) stop bit 0 : Oscillating 1 : Stopped 8 MHz oscillating 32 kHz oscillating φ is stopped (“H”) Timer operating 8 MHz oscillating 32 kHz oscillating f( φ) = 4 MHz 8 MHz stopped 32 kHz stopped φ is stopped (“H”) 8 MHz oscillating 32 kHz oscillating φ is stopped (“H”) Timer operating (See note 3) 8 MHz oscillating 32 kHz oscillating f( φ) = 16kHz 8 MHz stopped 32 kHz stopped φ is stopped (“H”) 8 MHz stopped 32 kHz stopped φ = stopped (“H”) 8 MHz stopped 32 kHz oscillating f( φ) = 16 kHz 8 MHz stopped 32 kHz oscillating φ is stopped (“H”) Timer operating (See note 3) Interrupt STP instruction Interrupt (See note 1) WIT instruction Interrupt WIT instruction Interrupt STP instruction Interrupt (See note 2) STP instruction Interrupt (See note 2) CM7 = 1 CM7 = 0 CM6 = 1 CM6 = 0 External INT, timer interrupt, or SI/O interrupt External INT Notes 1: When the STP state is ended, a delay of approximately 8 ms is automatically generated by timer 3 and timer 4. 2: The delay after the STP state ends is approximately 2s. 3: When the internal clock φ divided by 8 is used as the timer count source, the frequency of the count source is 2 kHz. The program must allow time for 8 MHz oscillation to stabilize High-speed operation start mode |
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