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M37151M6 Datasheet(PDF) 95 Page - Renesas Technology Corp |
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M37151M6 Datasheet(HTML) 95 Page - Renesas Technology Corp |
95 / 138 page M37151M6/M8/MA/MC/MF-XXXFP, M37151EFFP Rev.1.00 Nov 01, 2002 page 95 of 136 REJ03B0129-0100Z Fig.8.14.4 Clock Generating Circuit Block Diagram XCIN XIN XCOUT XOUT OSC1 clock selection bits (See notes 1, 4) Internal system clock selection bit (See notes 1, 3) Internal system clock selection bit (See notes 1, 3) Main clock (XIN–XOUT) stop bit (See notes 1, 3) R S Q STP instruction WIT instruction R S Q Reset Interrupt disable flag I Interrupt request R S Q Reset STP instruction Timing φ (Internal clock) Timer 3 count source selection bit (See notes 1, 2) “1” Timer 3 count stop bit (See notes 1, 2) Timer 4 count stop bit (See notes 1, 2) Timer 3 Timer 4 1/2 1/8 “1” “0” “0” Notes 1 : The value at reset is “0.” 2: Refer to timer mode register 2. 3: Refer to the CPU mode register. 4: Refer to the OSD control register. |
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