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M37151M6 Datasheet(PDF) 92 Page - Renesas Technology Corp |
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M37151M6 Datasheet(HTML) 92 Page - Renesas Technology Corp |
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92 / 138 page  M37151M6/M8/MA/MC/MF-XXXFP, M37151EFFP Rev.1.00 Nov 01, 2002 page 92 of 136 REJ03B0129-0100Z 8.13. RESET CIRCUIT When the oscillation of a quartz-crystal oscillator or a ceramic reso- nator is stable and the power source voltage is 5 V ± 10 %, hold the RESET pin at LOW for 2 µs or more, then return to HIGH. Then, as shown in Figure 8.13.2, reset is released and the program starts from the address formed by using the content of address FFFF16 as the high-order address and the content of the address FFFE16 as the low-order address. The internal states of the microcomputer at reset are shown in Figures 8.2.2 to 8.2.5. An example of the reset circuit is shown in Figure 8.13.1. The reset input voltage must be kept 0.9 V or less until the power source voltage surpasses 4.5 V. Fig.8.13.2 Reset Sequence Fig.8.13.1 Example of Reset Circuit Power source voltage 0 V Reset input voltage 0 V 4.5 V 0.9 V Power on Vcc RESET Vss Microcomputer 1 5 4 3 0.1 µF M51953AL XIN φ RESET Internal RESET SYNC Address Data 32768 count of XIN clock cycle (See note 3) Reset address from the vector table ? ? 01, S 01, S-1 01, S-2 FFFE FFFF ADH, ADL ? ? ? ? ? ADL ADH Notes 1 : f(XIN) and f( φ) are in the relation : f(XIN) = 2·f (φ). 2 : A question mark (?) indicates an undefined state that depends on the previous state. 3 : Immediately after a reset, timer 3 and timer 4 are connected by hardware. At this time, “FF16” is set in timer 3 and “0716” is set to timer 4. Timer 3 counts down with f(XIN)/16, and reset state is released by the timer 4 overflow signal. |
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