M37151M6 datasheet(72/138 Pages) RENESAS

Part #	M37151M6

Description	SNGLE-CHIP 8-BIT CMOS MICROCOMPUTER

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Manufacturer	RENESAS [Renesas Technology Corp]

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M37151M6/M8/MA/MC/MF-XXXFP, M37151EFFP

Rev.1.00

Nov 01, 2002

page 72 of 136

REJ03B0129-0100Z

Fig. 8.11.15 Relation between Field Determination Flag and Display Font

Field

Even

Odd

Field

determination

flag(Note)

Display dot line

selection bit

Display dot line

0 (T2 > T1)

1 (T3 < T2)

0

1

0

1

When using the field determination flag, be sure to set bit 0 of the PWM mode register 1 (address 0208

Both HSYNC cignal and VSYNC signal are negative-polarity input

16

) to “0.”

T2

T3

OSD ROM font configuration diagram

Dot line 0

Dot line 1

Odd

Dot line 0

Dot line 1

(n – 1) field

(Odd-numbered)

T1

0.25 to 0.50[

µs] at

f(XIN) = 8 MHz

CC mode

13

57

911

13

15

1

3

5

7

9

11

13

15

17

19

21

23

25

26

24

22

20

18

16

14

12

10

8

6

4

2

24

68

10

12

14

16

1

3

5

7

9

11

13

15

17

19

20

18

16

14

12

10

8

6

4

2

13

5

7

911

13

15

2

4

6

8

10

12

14

16

OSD mode

HSYNC

VSYNC and

VSYNC

control

signal

in microcom-

puter

Upper :

VSYNC signal

Lower :

VSYNC control

signal in

micro-

computer

(n) field

(Even-numbered)

(n + 1) field

(Odd-numbered)

“0,”

” font is displayed at even field, the

“

I/O polarity control register can be read as the

field determination flag : “1” is read at odd field,

“0” is read at even field.

Note : The field determination flag changes at a rising edge of the V SYNC control signal (negative-polarity input) in

the microcomputer.

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