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M37151M6 Datasheet(PDF) 70 Page - Renesas Technology Corp |
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M37151M6 Datasheet(HTML) 70 Page - Renesas Technology Corp |
70 / 138 page M37151M6/M8/MA/MC/MF-XXXFP, M37151EFFP Rev.1.00 Nov 01, 2002 page 70 of 136 REJ03B0129-0100Z 8.11.3 Clock for OSD The following 2 types of clocks can be selected for OSD display: • Data slicer clock output from the data slicer (approximately 26 MHz) • OSD clock f (osc) generated based on the reference clock from pin XIN. The OSD clock for each block can be selected by bits 3 and 4 of the clock source control register (addresses 00D016). Fig. 8.11.12 Block Diagram of OSD Selection Circuit Data slicer circuit Data slicer clock (See note) CC mode block OSD mode block Note : To use data slicer clock, set bit 0 of data slicer control register 1 to “1.” When use the clock for OSD generated based on the main clock, set the bit 0 of the clock control register 1 to “0.” “0” “0” “1” “1” OC3 OC4 f(osc) Fig. 8.11.13 Clock control register 1 Clock control register 1 Clock control register 1 (CC1) [Address 00CD16] b7 b6 b5 b4 b3 b2 b1 b0 0 0 000 0 0 0 0 0 System clock generating circuit control bit (CC10) 0: Operation 1: Stop Fix these bits to "0" 1 to 7 Name B Functions After reset R W R W R W |
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