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M37151M6 Datasheet(PDF) 67 Page - Renesas Technology Corp |
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M37151M6 Datasheet(HTML) 67 Page - Renesas Technology Corp |
67 / 138 page ![]() M37151M6/M8/MA/MC/MF-XXXFP, M37151EFFP Rev.1.00 Nov 01, 2002 page 67 of 136 REJ03B0129-0100Z Fig. 8.11.7 Vertical Position Register i (i = 1 and 2) b7 b6 b5 b4 b3 b2 b1 b0 0 to 7 R W Vertical Position Register i Vertical position register i (VPi) (i = 1 and 2) [Addresses 00D416, 00D516] B Name Functions After reset RW Inderterminate Vertical display start position control bits (VPi0 to VPi7) (See note) Vertical display start position = TH 5 (BCi6 ✕ 16 2 + n) (n: setting value, TH: HSYNC cycle, BCi6: bit 6 of block control register i) Notes 1: Set values except “0016” to VPi when BCi6 is “0.” 2: When OS21 of OSD control register 2 = “0”, TH = 1HSYNC, and OS21 of OSD control register 2 = “1”, TH = 2HSYNC. The vertical display start position for each block can be set in 512 steps (where each step is 1TH (TH: HSYNC cycle)) as values “0016” to “FF16” in vertical position register i (i = 1 and 2) (addresses 00D416 and 00D516) and values “0” or “1” in bit 6 of block control register i (i = 1 and 2) (addresses 00D216 and 00D316). The vertical position register is shown in Figure 8.11.7. The vertical display start position of both blocks can be switched in each step to 1TH or 2TH by setting values “0” or “1” in bit 1 of OSD control register 2 (address 00DB16). |
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