M37151M6 datasheet(55/138 Pages) RENESAS

Part #	M37151M6

Description	SNGLE-CHIP 8-BIT CMOS MICROCOMPUTER

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Manufacturer	RENESAS [Renesas Technology Corp]

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M37151M6/M8/MA/MC/MF-XXXFP, M37151EFFP

Rev.1.00

Nov 01, 2002

page 55 of 136

REJ03B0129-0100Z

Fig. 8.10.9 Caption Position Register

Field and Line to Generate Slice Voltage

• Field specified by bit 1 of DSC1

• Line 21 (total 1 line)

• Field specified by bit 1 of DSC1

• A line specified by bits 4 to 0 of CPS

(total 1 line) (See note 3)

• Field specified by bit 1 of DSC1

• Line 21 (total 1 line)

• Field specified by bit 1 of DSC1

• Line 21 and a line specified by bits 4 to 0 of CPS

(total 2 lines) (See note 2)

Field and Line to Be Sliced Data

• Both fields of F1 and F2

• Line 21 and a line specified by bits 4 to 0 of CPS

(total 2 lines) (See note 2)

• Both fields of F1 and F2

• A line specified by bits 4 to 0 of CPS

(total 1 line) (See note 3)

• Both fields of F1 and F2

• Line 21 (total 1 line)

• Both fields of F1 and F2

• Line 21 and a line specified by bits 4 to 0 of CPS

(total 2 lines) (See note 2)

CPS

b7

0

1

b6

0

1

0

1

Notes 1: DSC1 is data slicer control register 1.

CPS is caption position register.

2: Set “0016” to “1016” to bits 4 to 0 of CPS.

3: Set “0016” to “1F16” to bits 4 to 0 of CPS.

Table 8.10.1 Specification of Data Slice Line

b7 b6 b5 b4 b3 b2 b1 b0

Caption Position Register (CPS) [Address 00E616]

Caption Position Register

0

to

4

0

R W

0

R W

Caption position

bits(CPS0 to CPS4)

6, 7

Refer to the corresponding

Table (Table 8.10.1).

Slice line mode

specification bits

(in 1 field) (CPS6, CPS7)

5

0: Data is not latched yet and a

clock-run-in is not determined.

1: Data is latched and a

clock-run-in is determined.

Caption data latch

completion flag 2

(CPS5)

Indeterminate R —

After reset

Functions

Na

B

me

R W

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