2SJ550 datasheet(4/9 Pages) RENESAS

Part #	2SJ550

Description	Silicon P Channel MOS FET

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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4 / 9 page

2SJ550(L), 2SJ550(S)

Rev.3.00 Sep 07, 2005 page 4 of 8

0.40

–40

0

40

80

120

160

Case Temperature

Tc (°C)

0

0.08

0.16

0.24

0.32

Static Drain to Source on State Resistance

vs. Temperature

Pulse Test

ID = –15 A

Forward Transfer Admittance vs.

Drain Current

Drain Current ID (A)

100

30

3

10

0.3

1

0.1

–0.1

–0.3

–1

–3

–30

–10

–100

Tc = –25°C

75°C

VDS = –10 V

Pulse Test

25°C

Reverse Drain Current

IDR (A)

Body-Drain Diode Reverse

Recovery Time

–0.1 –0.2

–0.5 –1

–2

–5

–20

–10

500

100

200

20

50

5

10

di / dt = 50 A /

µs

VGS = 0, Ta = 25°C

0

–10

–20

–30

–40

–50

Drain to Source Voltage VDS (V)

Typical Capacitance vs.

Drain to Source Voltage

10000

1000

3000

300

30

100

10

Ciss

Coss

Crss

VGS = 0

f = 1 MHz

0

Gate Charge

Qg (nc)

0

–20

–16

–12

–8

–4

–100

–80

–60

–40

–20

Dynamic Input Characteristics

816

24

32

40

VDS

VGS

1000

200

500

100

20

50

10

–0.2

–0.5 –1

–5

–2

–20

–10

–0.1

tf

tr

td(off)

td(on)

Drain Current

ID (A)

Switching Characteristics

VDD = –10 V

–25 V

–50 V

VDD = –50 V

–25 V

–10 V

VGS = –4 V

–10 A

–5 A

–5 A, –10 A, –15 A

VGS = –10 V, VDD = –30 V

PW = 5

µs, duty ≤ 1 %

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