ST90158-ST90135 datasheet(4/190 Pages) STMICROELECTRONICS

Part #	ST90158-ST90135

Description	8/16-BIT MCU FAMILY WITH UP TO 64K ROM/OTP/EPROM AND UP TO 2K RAM

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Table of Contents

1

7.2.7

PORT 1 . . . . . . .... . . . . .. . . . . . . . . . . . . . ... ... . . . . . . . . . . ... .. .. . . . . . . 86

7.2.8

WAIT: External Memory Wait . . . . . . . . . . . . . . . . . . . . . . . . . . .... . ... .. . . ... 86

7.3 REGISTER DESCRIPTION . .... . ... .. . . ... ... . ... .. . . ... .. . .... . ... .. . . ... 87

8 I/O PORTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ... . . . . ... .. ... .. .. ... .. . ... .. . . ... . . 90

8.1 INTRODUCTION . . . . . . . . . . . . . .... . . ... .. ... .. .. . . . . . . . ... .. .. .... . . ... .. 90

8.2 SPECIFIC PORT CONFIGURATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .... . ... 90

8.3 PORT CONTROL REGISTERS . . . . . . . . . . . . . . . . . . .... . . . .... .... .. . .... .. . . . 90

8.4 INPUT/OUTPUT BIT CONFIGURATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91

8.5 ALTERNATE FUNCTION ARCHITECTURE . . . . . . . . . . . . . . . . . . . . . . . . .... . . ... .. 95

8.5.1

Pin Declared as I/O . . .... . ... .. . . . . .... . ... .. . . ... .. . . . . . . ... .. . . ... 95

8.5.2

Pin Declared as an Alternate Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95

8.5.3

Pin Declared as an Alternate Function Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95

8.6 I/O STATUS AFTER WFI, HALT AND RESET . . . . . . . . . . . . . . . . . . . . . . .... . . ... .. 95

9 ON-CHIP PERIPHERALS . . . . . . . . . . . .... . . ... .. .... ... . . . . . . . . . . . . . . . . . . . . ... .. 96

9.1 TIMER/WATCHDOG (WDT) . . . . . . . . . . . . . .... . ... .. . . . . .... . . . . .. . . . . . . . . . . 96

9.1.1

Introduction . . . . . . . . . . . . .... . . ... .. .... ... . . . . . . . . . . . . . . . . . . . . ... .. 96

9.1.2

Functional Description . . . . . . . . . ... .. ... .. .. . . . . . . . ... .. .. .... . . ... .. 97

9.1.3

Watchdog Timer Operation . . . . . . . . . . .... .... .. . . . . . . . . . . . . . ... .. . .... 98

9.1.4

WDT Interrupts .... .... .. . .... .. . .... . ... .. .. .. .... . . . ... . . . . . . . . . 100

9.1.5

Register Description . . . . . .... . . ... .. .... ... . . . . . . . . . . . . . . . . . .. . ... . 101

9.2 MULTIFUNCTION TIMER (MFT) . . . . . . . . . . . . . . . . . . . . . . . . .... .... .. . . . . . . . . . 103

9.2.1

Introduction . . . . . . . . . . . . .... . . ... .. .... ... . . . . . . . . . . . . . . . . . . . . ... . 103

9.2.2

Functional Description . . . . . . . . . ... .. ... .. .. . . . . . . . ... .. .. .... . . ... . 105

9.2.3

Input Pin Assignment . . . . . . . . . . . . . .... . ... .. .. .. .... . . . ... . . . . . . . . . 108

9.2.4

Output Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112

9.2.5

Interrupt and DMA . . . . . . . . . . . . . . . . .... . . . ... . . . . . . . . . . . . . ... ... . . . 114

9.2.6

Register Description . . . . . .... . . ... .. .... ... . . . . . . . . . . . . . . . . . .. . ... . 116

9.3 STANDARD TIMER (STIM) . . . . ... . ... ... . . . . ... .. ... .. . . . . . . . . ... .. . . ... . 127

9.3.1

Introduction . . . . . . . . . . . . .... . . ... .. .... ... . . . . . . . . . . . . . . . . . . . . ... . 127

9.3.2

Functional Description . . . . . . . . . ... .. ... .. .. . . . . . . . ... .. .. .... . . ... . 128

9.3.3

Interrupt Selection . . . .... . ... .. . . . . . ... . ... .. . . ... .. . .... . ... .. . . .. 129

9.3.4

Register Mapping . . . . . . . .... . . ... .. ... .. .. . . . . . . . . . . . . . . .... . . ... . 129

9.3.5

Register Description . . . . . .... . . ... .. .... ... . . . . . . . . . . . . . . . . . .. . ... . 130

9.4 SERIAL PERIPHERAL INTERFACE (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . .... . . ... . 131

9.4.1

Introduction . . . . . . . . . . . . .... . . ... .. .... ... . . . . . . . . . . . . . . . . . . . . ... . 131

9.4.2

Device-Specific Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131

9.4.3

Functional Description . . . . . . . . . ... .. ... .. .. . . . . . . . ... .. .. .... . . ... . 132

9.4.4

Interrupt Structure . . . .... . ... .. . . ... ... . ... .. .. ... .. . . ... . ... .. .. .. 133

9.4.5

Working With Other Protocols . . . . . . . .... .... .. . .... .. . . . . . . ... .. . . . . 134

9.4.6

I2C-bus Interface . . . .... . ... .. . . ... ... . ... .. .. ... .. . . ... . ... .. .. .. 134

9.4.7

S-Bus Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .... .... .. . . . . . . . . . 137

9.4.8

IM-bus Interface . . . . . . . . . . . . . . ... .. ... .. .. ... .. .. ... .. .. .... . . ... . 138

9.4.9

Register Description . . . . . .... . . ... .. .... ... . . . . . . . . . . . . . . . . . .. . ... . 139

9.5 SERIAL COMMUNICATIONS INTERFACE (SCI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141

9.5.1

Introduction . . . . . . . . . . . . .... . . ... .. .... ... . . . . . . . . . . . . . . . . . . . . ... . 141

9.5.2

Functional Description . . . . . . . . . ... .. ... .. .. . . . . . . . ... .. .. .... . . ... . 142

9.5.3

SCI Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143

9.5.4

Serial Frame Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146

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