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GS9090B Datasheet(PDF) 44 Page - Gennum Corporation |
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GS9090B Datasheet(HTML) 44 Page - Gennum Corporation |
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44 / 71 page  GS9090B Data Sheet 40749 - 2 January 2007 44 of 71 3.9.7.3 Lock Error Detection The LOCKED pin of the GS9090B asserts HIGH when the device has correctly locked to the received data stream (see Section 3.5.1). The GS9090B will also indicate lock error to the host interface when LOCKED = LOW by setting the LOCK_ERR bit in the ERROR_STATUS register HIGH (Table 3-11). 3.9.7.4 Ancillary Data Checksum Error Detection The GS9090B will calculate checksums for all received ancillary data types and compare the calculated values to the received checksum words. If a mismatch is detected, the CS_ERR bit of the ERROR_STATUS register will be set HIGH (Table 3-11). Although the GS9090B will calculate and compare checksum values for all ancillary data types by default, the host interface may be programmed to check only certain types of ancillary data checksums, as described in Section 3.9.2.1. 3.9.7.5 TRS Error Detection TRS error flags are generated by the GS9090B when the received TRS H timing does not correspond to the internal flywheel timing, or when the received TRS Hamming codes are incorrect. These errors are flagged via the SAV_ERR and/or EAV_ERR bits of the ERROR_STATUS register (Table 3-11). Both 8-bit and 10-bit SAV and EAV errors are handled by the GS9090B. NOTE: H timing based TRS errors will only be detected if the FW_EN pin is set HIGH. F & V timing errors are not detected or corrected. 3.9.8 Additional Processing Functions The GS9090B contains an additional processing block which is available in SMPTE mode only. The IOPROC_EN pin must be set HIGH to enable these functions. These functions, which are all enabled by default, may be enabled or disabled individually by setting bits 0 to 3 in the IOPROC_DISABLE register (Table 3-14). NOTE: After a device reset, these functions will revert to their default values. |
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