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GS9090B Datasheet(PDF) 35 Page - Gennum Corporation |
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GS9090B Datasheet(HTML) 35 Page - Gennum Corporation |
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35 / 71 page  GS9090B Data Sheet 40749 - 2 January 2007 35 of 71 3.9.4 EDH Flag Detection As described in Section 3.9.3, the GS9090B can detect EDH packets in the received data stream. The EDH flags for ancillary data, active picture, and full field areas are extracted from the detected EDH packets and placed in the EDH_FLAG_IN register at address 02h (Table 3-5). When the EDH_FLAG_UPDATE bit in the DATA_FORMAT register 04h (Table 3-7) is set HIGH, the GS9090B will update the ancillary data, full field, and active picture EDH flags according to SMPTE RP165. The updated EDH flags are available in the EDH_FLAG_OUT register at address 03h (Table 3-6). The EDH packet output from the device will contain the updated flags. One set of flags is provided for both fields 1 and 2. Field 1 flag data will be overwritten by field 2 flag data. When EDH packets are not detected, the UES flags in the EDH_FLAG_OUT register will be set HIGH to signify that the received signal does not support Error Detection and Handling. In addition, the EDH_DETECT bit will be set LOW. These flags are set regardless of the setting of the EDH_FLAG_UPDATE bit. EDH_FLAG_OUT and EDH_FLAG_UPDATE may be read by the host interface at any time during the received frame except on the lines defined in SMPTE RP165, where these flags are updated. The GS9090B will indicate the CRC validity for both active picture and full field CRCs. The AP_CRC_V bit in the DATA_FORMAT register indicates the active picture CRC validity, and the FF_CRC_V bit indicates the full field CRC validity (see Table 3-7). When EDH_DETECT = LOW, these bits will be cleared. The EDH_FLAG_OUT and EDH_FLAG_UPDATE register values remain set until overwritten by the decoded flags in the next received EDH packet in the following field. When an EDH packet is not detected during vertical blanking, the flag registers will be cleared at the end of the vertical blanking period. Table 3-5: Host Interface Description for EDH Flag Registers Register Name Bit Name Description R/W Default EDH_FLAG_IN Address: 02h 15 – Not Used – – 14 ANC-UES_IN Ancillary Unknown Error Status Flag R 0 13 ANC-IDA_IN Ancillary Internal device error Detected Already Flag. R 0 12 ANC-IDH_IN Ancillary Internal device error Detected Here Flag. R 0 11 ANC-EDA_IN Ancillary Error Detected Already Flag. R 0 10 ANC-EDH_IN Ancillary Error Detected Here Flag. R 0 9 FF-UES_IN Full Field Unknown Error Status Flag. R 0 8 FF-IDA_IN Full Field Internal device error Detected Already Flag. R 0 7 FF-IDH_IN Full Field Internal device error Detected Here Flag. R 0 |
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